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Re: [Qemu-devel] [PATCH v2 6/8] ppc/pnv: add a helper to calculate MMIO


From: David Gibson
Subject: Re: [Qemu-devel] [PATCH v2 6/8] ppc/pnv: add a helper to calculate MMIO addresses registers
Date: Thu, 23 Mar 2017 15:16:33 +1100
User-agent: Mutt/1.8.0 (2017-02-23)

On Thu, Mar 16, 2017 at 03:35:10PM +0100, Cédric Le Goater wrote:
> Some controllers (ICP, PSI) have a base register address which is
> calculated using the chip id.
> 
> Signed-off-by: Cédric Le Goater <address@hidden>

Reviewed-by: David Gibson <address@hidden>

> ---
>  include/hw/ppc/pnv.h | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index d6ef04771aff..cfd059fc49db 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -92,14 +92,24 @@ typedef struct PnvChipClass {
>      OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9)
>  
>  /*
> - * This generates a HW chip id depending on an index:
> + * This generates a HW chip id depending on an index, as found on a
> + * two socket system with dual chip modules :
>   *
>   *    0x0, 0x1, 0x10, 0x11
>   *
>   * 4 chips should be the maximum
> + *
> + * TODO: use a machine property to define the chip ids
>   */
>  #define PNV_CHIP_HWID(i) ((((i) & 0x3e) << 3) | ((i) & 0x1))
>  
> +/*
> + * Converts back a HW chip id to an index. This is useful to calculate
> + * the MMIO addresses of some controllers which depend on the chip id.
> + */
> +#define PNV_CHIP_INDEX(chip)                                    \
> +    (((chip)->chip_id >> 2) * 2 + ((chip)->chip_id & 0x3))
> +
>  #define TYPE_POWERNV_MACHINE       MACHINE_TYPE_NAME("powernv")
>  #define POWERNV_MACHINE(obj) \
>      OBJECT_CHECK(PnvMachineState, (obj), TYPE_POWERNV_MACHINE)

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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