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Re: [Qemu-devel] [Qemu-ppc] [PATCH RFC v1 0/3] Enable MTTCG on PPC64

From: Cédric Le Goater
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH RFC v1 0/3] Enable MTTCG on PPC64
Date: Tue, 11 Apr 2017 14:28:22 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0

On 04/10/2017 07:20 PM, Alex Bennée wrote:
> Cédric Le Goater <address@hidden> writes:
>> On 04/07/2017 08:07 AM, Cédric Le Goater wrote:
>>> On 04/07/2017 07:24 AM, Nikunj A Dadhania wrote:
>>>> Cédric Le Goater <address@hidden> writes:
>>>>> Hello Nikunj,
>>>>> On 04/06/2017 12:22 PM, Nikunj A Dadhania wrote:
>>>>>> The series enables Multi-Threaded TCG on PPC64
>>>>>> Patch 01: Use atomic_cmpxchg in store conditional
>>>>>>       02: Handle first write to page during atomic operation
>>>>>>       03: Generate memory barriers for sync/isync and load/store 
>>>>>> conditional
>>>>>> Patches are based on ppc-for-2.10
>>>>>> Tested using following:
>>>>>> ./ppc64-softmmu/qemu-system-ppc64 -cpu POWER8 -vga none -nographic 
>>>>>> -machine pseries,usb=off -m 2G  -smp 8,cores=8,threads=1 -accel 
>>>>>> tcg,thread=multi  f23.img
>>>>> I tried it with a Ubuntu 16.04.2 guest using stress --cpu 8. It looked
>>>>> good : the CPU usage of QEMU reached 760% on the host.
>>>> Cool.
>>>>>> Todo:
>>>>>> * Enable other machine types and PPC32.
>>>>> I am quite ignorant on the topic.
>>>>> Have you looked at what it would take to emulate support of the HW
>>>>> threads ?
>>>> We would need to implement msgsndp (doorbell support for IPI between
>>>> threads of same core)
>>> ok. I get it. Thanks,
>>>>> and the PowerNV machine ?
>>>> Haven't tried it, should work. Just give a shot, let me know if you see 
>>>> problems.
>>> sure. pnv is still on 2.9, so I will rebase on 2.10, merge your
>>> patches  and tell you.
>> The system seems to be spinning in skiboot in cpu_idle/relax when
>> starting the linux kernel. It finally boots, but it is rather long.
>> David has merged enough to test if you want to give it a try.
> Does PPC have Wait-for-irq or similar "sleeping" instructions?
> We had to ensure we were not jumping out of the cpu loop and suspend
> normally.

I really don't know. 

Ben, now that we have mttcg activated by default on ppc, it takes 
a while for the linux kernel to do the early setup. I think we are
in the code section where we spin loop the secondaries. Most of the
time is spent in skiboot under cpu_idle/relax.

Any idea where that could come from ? 

> See c22edfebff29f63d793032e4fbd42a035bb73e27 for an example.

Thanks for the hint.


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