[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] timer configure for QEMU versatilepb
From: |
heavybird |
Subject: |
[Qemu-devel] timer configure for QEMU versatilepb |
Date: |
Tue, 9 May 2017 12:32:57 +0800 |
Hi Peter and qemu-devel,
I am trying to port one simple RTOS to QEMU versatilepb, however, i found the
SIC address(actually PIC) is different from the PIC in the integratorcp.c even
though they are same arm926, besides, the PIC register bit definition is some
different between versatilepb and integratorcp compared by the
icp_pic_read/icp_pic_read interface.
1 address defferent between versatilepb and integratorcp
versatilepb integratorcp
TIMER_0 adress 0x101e2000 0x13000000
ADDRESS_PIC 0x10003000 0x14000000
i had tried the 2 address above to turn on the timer0 but it is failed with
versatilepb, it is ok to turn on the integratorcp timer0 with 0x13000000 timer0
addr and 0x14000000 for PIC.
2 PIC register bit difference after bit8
2.1 intergratorcp definition
case 8: /* FRQ_STATUS */
return s->level & s->fiq_enabled;
case 9: /* FRQ_RAWSTAT */
return s->level;
case 10: /* FRQ_ENABLESET */
return s->fiq_enabled;
case 11: /* FRQ_ENABLECLR */
versatilepb SIC definition
case 8: /* PICENABLE */
return s->pic_enable;
case 9: /* PICENCLR */
s->pic_enable &= ~value;
vpb_sic_update_pic(s);
break;
Could you confirm for me PIC register bit definition and the PIC address/timer0
address in the versatilepb QEMU or where i can find some information exactly.
thanks
jason
- [Qemu-devel] timer configure for QEMU versatilepb,
heavybird <=