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Re: [Qemu-devel] [PATCH v1 2/8] target-microblaze: Don't hard code 0xb a


From: Alistair Francis
Subject: Re: [Qemu-devel] [PATCH v1 2/8] target-microblaze: Don't hard code 0xb as initial MB version
Date: Tue, 20 Jun 2017 14:13:30 -0700

On Tue, Jun 20, 2017 at 8:51 AM, Edgar E. Iglesias
<address@hidden> wrote:
> From: "Edgar E. Iglesias" <address@hidden>
>
> Don't hard code 0xb as initial MB version.
>
> Signed-off-by: Edgar E. Iglesias <address@hidden>

Reviewed-by: Alistair Francis <address@hidden>

Thanks,
Alistair

> ---
>  target/microblaze/cpu.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index af70faa..4bc77df 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -152,8 +152,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>                         | PVR0_USE_HW_MUL_MASK \
>                         | PVR0_USE_EXC_MASK \
>                         | PVR0_USE_ICACHE_MASK \
> -                       | PVR0_USE_DCACHE_MASK \
> -                       | (0xb << 8);
> +                       | PVR0_USE_DCACHE_MASK;
>      env->pvr.regs[2] = PVR2_D_OPB_MASK \
>                          | PVR2_D_LMB_MASK \
>                          | PVR2_I_OPB_MASK \
> --
> 2.7.4
>
>



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