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[Qemu-devel] [RISU PATCH 02/11] reginfo.c: always return 1 on OP_TESTEND
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RISU PATCH 02/11] reginfo.c: always return 1 on OP_TESTEND |
Date: |
Tue, 4 Jul 2017 15:48:50 +0100 |
In the master/apprentice setup the response byte of 1 is returned by
write_fn. However when tracing it will happily report 0 as it
successfully writes the last bytes. To avoid running of the end when
tracing we just always return 1 at this point.
Signed-off-by: Alex Bennée <address@hidden>
---
reginfo.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/reginfo.c b/reginfo.c
index d9d37b3..76f24f9 100644
--- a/reginfo.c
+++ b/reginfo.c
@@ -39,7 +39,10 @@ int send_register_info(write_fn write_fn, void *uc)
switch (op) {
case OP_TESTEND:
- return write_fn(&ri, sizeof(ri));
+ write_fn(&ri, sizeof(ri));
+ /* if we are tracing write_fn will return 0 unlike a remote
+ end, hence we force return of 1 here */
+ return 1;
case OP_SETMEMBLOCK:
memblock = (void *)(uintptr_t)get_reginfo_paramreg(&ri);
break;
--
2.13.0
- [Qemu-devel] [RISU PATCH 00/11] Misc fixes, documentation and patterns, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 04/11] README: document record/replay support, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 03/11] README: document --static builds, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 01/11] risu: make match status take tracing into account, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 05/11] risu.el: derive from text-mode, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 06/11] risugen: fix bad indent, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 02/11] reginfo.c: always return 1 on OP_TESTEND,
Alex Bennée <=
- [Qemu-devel] [RISU PATCH 07/11] risugen: support @GroupName in risu files, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 08/11] aarch64.risu: document naming conventions, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 09/11] aarch64.risu: remove duplicate AdvSIMD Scalar 3 same block, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 10/11] aarch64.risu: remove duplicate AdvSIMD scalar 2 reg misc block, Alex Bennée, 2017/07/04
- [Qemu-devel] [RISU PATCH 11/11] aarch64.risu: update AdvancedSIMD across lanes, Alex Bennée, 2017/07/04
- Re: [Qemu-devel] [RISU PATCH 00/11] Misc fixes, documentation and patterns, Peter Maydell, 2017/07/10