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[Qemu-devel] [PATCH 3/8] sun4u: expose fw_cfg and NVRAM on ebus PCI IO a
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCH 3/8] sun4u: expose fw_cfg and NVRAM on ebus PCI IO address space |
Date: |
Tue, 11 Jul 2017 22:53:22 +0100 |
To allow future changes to the sun4u PCI topology.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-By: Artyom Tarasenko <address@hidden>
---
hw/sparc64/sun4u.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 8932be9..4f96d97 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -450,7 +450,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
&pci_bus3, &pbm_irqs);
pci_vga_init(pci_bus);
- // XXX Should be pci_bus3
+ /* XXX Should be pci_bus3 */
ebus = pci_create_simple(pci_bus, -1, "ebus");
isa_bus = pci_ebus_init(ebus, pbm_irqs);
@@ -492,7 +492,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
/* Map NVRAM into I/O (ebus) space */
nvram = m48t59_init(NULL, 0, 0, NVRAM_SIZE, 1968, 59);
s = SYS_BUS_DEVICE(nvram);
- memory_region_add_subregion(get_system_io(), 0x2000,
+ memory_region_add_subregion(pci_address_space_io(ebus), 0x2000,
sysbus_mmio_get_region(s, 0));
initrd_size = 0;
@@ -514,10 +514,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
dev = qdev_create(NULL, TYPE_FW_CFG_IO);
qdev_prop_set_bit(dev, "dma_enabled", false);
- object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
- OBJECT(dev), NULL);
+ object_property_add_child(OBJECT(ebus), TYPE_FW_CFG, OBJECT(dev), NULL);
qdev_init_nofail(dev);
- memory_region_add_subregion(get_system_io(), BIOS_CFG_IOPORT,
+ memory_region_add_subregion(pci_address_space_io(ebus), BIOS_CFG_IOPORT,
&FW_CFG_IO(dev)->comb_iomem);
fw_cfg = FW_CFG(dev);
--
1.7.10.4
- [Qemu-devel] [PATCH 0/8] sun4u: change PCI topology to better match a real Ultra 5, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 2/8] sun4u: switch to using qdev to instantiate fw_cfg interface, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 4/8] apb: fix up PCI bus nomenclature, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 3/8] sun4u: expose fw_cfg and NVRAM on ebus PCI IO address space,
Mark Cave-Ayland <=
- [Qemu-devel] [PATCH 7/8] sun4u: create single default onboard ne2k_pci NIC for machine, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 6/8] apb: add busA qdev property to PBM PCI bridge, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 8/8] sun4u: move in-built devices behind PCI bridge A, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 1/8] sun4u: pass PCIDevice into pci_ebus_init() instead of PCIBus, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 5/8] apb: fix endianness for APB and PCI config accesses, Mark Cave-Ayland, 2017/07/11
- Re: [Qemu-devel] [PATCH 0/8] sun4u: change PCI topology to better match a real Ultra 5, no-reply, 2017/07/11