Re: [Qemu-devel] [PATCH 19/38] sh4: cleanup cpu type name composition

[Philippe Mathieu-Daudé]

On 10/02/2017 06:08 AM, Igor Mammedov wrote:
> introduce SUPERH_CPU_TYPE_NAME macro and use it to construct
> cpu type names. While at it move cpu type_infos into one
> array and register it directly with type_init_from_array()
> instead of custom superh_cpu_register_types()
> 
> Signed-off-by: Igor Mammedov <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
> CC: address@hidden
> ---
>  target/sh4/cpu-qom.h |  6 ++---
>  target/sh4/cpu.h     |  3 +++
>  target/sh4/cpu.c     | 63 
> +++++++++++++++++++++-------------------------------
>  3 files changed, 31 insertions(+), 41 deletions(-)
> 
> diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
> index 01abb20..17deeb6 100644
> --- a/target/sh4/cpu-qom.h
> +++ b/target/sh4/cpu-qom.h
> @@ -24,9 +24,9 @@
>  
>  #define TYPE_SUPERH_CPU "superh-cpu"
>  
> -#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
> -#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
> -#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
> +#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
> +#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
> +#define TYPE_SH7785_CPU  SUPERH_CPU_TYPE_NAME("sh7785")
>  
>  #define SUPERH_CPU_CLASS(klass) \
>      OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
> diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
> index 79f85d3..a25a3f6 100644
> --- a/target/sh4/cpu.h
> +++ b/target/sh4/cpu.h
> @@ -270,6 +270,9 @@ void cpu_load_tlb(CPUSH4State * env);
>  
>  #define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)
>  
> +#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
> +#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
> +
>  #define cpu_signal_handler cpu_sh4_signal_handler
>  #define cpu_list sh4_cpu_list
>  
> diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
> index 252440e..9198460 100644
> --- a/target/sh4/cpu.c
> +++ b/target/sh4/cpu.c
> @@ -172,13 +172,6 @@ static void sh7750r_class_init(ObjectClass *oc, void 
> *data)
>      scc->cvr = 0x00110000;
>  }
>  
> -static const TypeInfo sh7750r_type_info = {
> -    .name = TYPE_SH7750R_CPU,
> -    .parent = TYPE_SUPERH_CPU,
> -    .class_init = sh7750r_class_init,
> -    .instance_init = sh7750r_cpu_initfn,
> -};
> -
>  static void sh7751r_cpu_initfn(Object *obj)
>  {
>      SuperHCPU *cpu = SUPERH_CPU(obj);
> @@ -198,13 +191,6 @@ static void sh7751r_class_init(ObjectClass *oc, void 
> *data)
>      scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
>  }
>  
> -static const TypeInfo sh7751r_type_info = {
> -    .name = TYPE_SH7751R_CPU,
> -    .parent = TYPE_SUPERH_CPU,
> -    .class_init = sh7751r_class_init,
> -    .instance_init = sh7751r_cpu_initfn,
> -};
> -
>  static void sh7785_cpu_initfn(Object *obj)
>  {
>      SuperHCPU *cpu = SUPERH_CPU(obj);
> @@ -224,13 +210,6 @@ static void sh7785_class_init(ObjectClass *oc, void 
> *data)
>      scc->cvr = 0x71440211;
>  }
>  
> -static const TypeInfo sh7785_type_info = {
> -    .name = TYPE_SH7785_CPU,
> -    .parent = TYPE_SUPERH_CPU,
> -    .class_init = sh7785_class_init,
> -    .instance_init = sh7785_cpu_initfn,
> -};
> -
>  static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
>  {
>      CPUState *cs = CPU(dev);
> @@ -303,22 +282,30 @@ static void superh_cpu_class_init(ObjectClass *oc, void 
> *data)
>      dc->vmsd = &vmstate_sh_cpu;
>  }
>  
> -static const TypeInfo superh_cpu_type_info = {
> -    .name = TYPE_SUPERH_CPU,
> -    .parent = TYPE_CPU,
> -    .instance_size = sizeof(SuperHCPU),
> -    .instance_init = superh_cpu_initfn,
> -    .abstract = true,
> -    .class_size = sizeof(SuperHCPUClass),
> -    .class_init = superh_cpu_class_init,
> -};
> +#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
> +    {                                                    \
> +        .name = type_name,                               \
> +        .parent = TYPE_SUPERH_CPU,                       \
> +        .class_init = cinit,                             \
> +        .instance_init = initfn,                         \
> +    }
> +static const TypeInfo superh_cpu_type_infos[] = {
> +    {
> +        .name = TYPE_SUPERH_CPU,
> +        .parent = TYPE_CPU,
> +        .instance_size = sizeof(SuperHCPU),
> +        .instance_init = superh_cpu_initfn,
> +        .abstract = true,
> +        .class_size = sizeof(SuperHCPUClass),
> +        .class_init = superh_cpu_class_init,
> +    },
> +    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
> +                           sh7750r_cpu_initfn),
> +    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
> +                           sh7751r_cpu_initfn),
> +    DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
> +                           sh7785_cpu_initfn),
>  
> -static void superh_cpu_register_types(void)
> -{
> -    type_register_static(&superh_cpu_type_info);
> -    type_register_static(&sh7750r_type_info);
> -    type_register_static(&sh7751r_type_info);
> -    type_register_static(&sh7785_type_info);
> -}
> +};
>  
> -type_init(superh_cpu_register_types)
> +type_init_from_array(superh_cpu_type_infos)
>