Re: [Qemu-devel] [PATCH 01/13] target/arm: A53: Initialize PMCEID[0]

[Peter Maydell]

On 19 April 2017 at 18:41, Aaron Lindsay <address@hidden> wrote:
> A53 advertises ARM_FEATURE_PMU, but wasn't initializing pmceid[01]
>
> Signed-off-by: Aaron Lindsay <address@hidden>
> ---
>  target/arm/cpu.c   | 2 +-
>  target/arm/cpu64.c | 2 ++
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 04b062c..921b028 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1342,7 +1342,7 @@ static void cortex_a15_initfn(Object *obj)
>      cpu->id_pfr0 = 0x00001131;
>      cpu->id_pfr1 = 0x00011011;
>      cpu->id_dfr0 = 0x02010555;
> -    cpu->pmceid0 = 0x0000000;
> +    cpu->pmceid0 = 0x00000000;
>      cpu->pmceid1 = 0x00000000;
>      cpu->id_afr0 = 0x00000000;
>      cpu->id_mmfr0 = 0x10201105;

This is A15 code, which the commit message doesn't say anything about.
Fixing this code style nit should probably be a separate patch.

> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 670c07a..7b1642e 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -198,6 +198,8 @@ static void aarch64_a53_initfn(Object *obj)
>      cpu->id_isar5 = 0x00011121;
>      cpu->id_aa64pfr0 = 0x00002222;
>      cpu->id_aa64dfr0 = 0x10305106;
> +    cpu->pmceid0 = 0x00000000;
> +    cpu->pmceid1 = 0x00000000;
>      cpu->id_aa64isar0 = 0x00011120;
>      cpu->id_aa64mmfr0 = 0x00001122; /* 40 bit physical addr */
>      cpu->dbgdidr = 0x3516d000;

Does this actually make a difference? The field values should be 0
anyway if the CPU-specific initfn doesn't set them to anything.

thanks
-- PMM