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[Qemu-devel] [RFC v2 0/4] vITS Reset
From: |
Eric Auger |
Subject: |
[Qemu-devel] [RFC v2 0/4] vITS Reset |
Date: |
Mon, 23 Oct 2017 17:35:33 +0200 |
At the moment the ITS is not properly reset. On System reset or
reboot, previous ITS register values and caches are left
unchanged. Some of the registers might point to some guest RAM
tables which are not valid anymore. This leads to state
inconsistencies that are detected by the kernel save/restore
code. And eventually this may cause qemu abort.
The two first patches would need to be cc'ed stable. Assuming
patches 1-5 of "[PATCH v5 00/10] vITS Migration fixes and reset"
also are cc'ed stable, they fix the above issue, without
implementing a dedicated ITS KVM device reset IOCTL.
Patches 3-4 use the new reset IOCTL which clarifies the reset
process.
The series is in RFC state as it depends on:
[1] [PATCH v5 00/10] vITS Migration fixes and reset
Best Regards
Eric
The series is available at:
https://github.com/eauger/qemu/tree/v2.10-its-reset-v2
History:
v1 -> v2:
- Clarify why abort should be removed for save. Leave abort
for restore.
- Adopt the same reset infra as vgic
- introduce "hw/intc/arm_gicv3_its: Implement a minimalist reset"
which perform individual register writes. This is sufficient to
fix the issues without ioctl
Eric Auger (4):
hw/intc/arm_gicv3_its: Don't abort on table save failure
hw/intc/arm_gicv3_its: Implement a minimalist reset
linux-headers: Partial header update for ITS reset
hw/intc/arm_gicv3_its: Implement full reset
hw/intc/arm_gicv3_its_kvm.c | 53 +++++++++++++++++++++++++++++++++++++------
linux-headers/asm-arm/kvm.h | 1 +
linux-headers/asm-arm64/kvm.h | 1 +
3 files changed, 48 insertions(+), 7 deletions(-)
--
2.5.5
- [Qemu-devel] [RFC v2 0/4] vITS Reset,
Eric Auger <=