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[Qemu-devel] [RISU PATCH 1/7] aarch64.risu: document naming conventions
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RISU PATCH 1/7] aarch64.risu: document naming conventions |
Date: |
Tue, 31 Oct 2017 14:54:38 +0000 |
Signed-off-by: Alex Bennée <address@hidden>
---
aarch64.risu | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/aarch64.risu b/aarch64.risu
index 2f3341c..5e7ec59 100644
--- a/aarch64.risu
+++ b/aarch64.risu
@@ -19,6 +19,14 @@
# XXX NIY: SP-related instructions
# XXX NIY: floating point and SIMD specific insns
+# Instruction suffixes to identify variants
+# m - memory (loads/stores)
+# s - scalar
+# v - vector
+# z - zero (e.g. compare to zero)
+# f - fixed point
+#
+
# - - - - 1 - 0 - - - - - - - - - - - - - - - Loads and stores
# C3.3 Loads and stores
--
2.14.2
- [Qemu-devel] [RISU PATCH 0/7] Add @Group support and some aarch64.risu cleanups, Alex Bennée, 2017/10/31
- [Qemu-devel] [RISU PATCH 4/7] aarch64.risu: update AdvancedSIMD across lanes, Alex Bennée, 2017/10/31
- [Qemu-devel] [RISU PATCH 2/7] aarch64.risu: remove duplicate AdvSIMD Scalar 3 same block, Alex Bennée, 2017/10/31
- [Qemu-devel] [RISU PATCH 5/7] risugen/risugen_$arch: factor out instruction selection, Alex Bennée, 2017/10/31
- [Qemu-devel] [RISU PATCH 1/7] aarch64.risu: document naming conventions,
Alex Bennée <=
- [Qemu-devel] [RISU PATCH 3/7] aarch64.risu: remove duplicate AdvSIMD scalar 2 reg misc block, Alex Bennée, 2017/10/31
- [Qemu-devel] [RISU PATCH 6/7] risugen: support @GroupName in risu files, Alex Bennée, 2017/10/31
- [Qemu-devel] [RISU PATCH 7/7] aarch64.risu: clean-up and annotate with groups, Alex Bennée, 2017/10/31