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Re: [Qemu-devel] [PULL 0/5] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 0/5] target-arm queue |
Date: |
Tue, 31 Oct 2017 15:33:03 +0000 |
On 31 October 2017 at 13:11, Peter Maydell <address@hidden> wrote:
> Just small stuff. I expect/hope to get the "report attributes
> in PAR register" fix from Andrew in, but will either send another
> pull or just apply it as a single patch once it's been reviewed.
> (I think we can call it a bugfix anyway, since it fixes booting
> of Windows on ARM.)
>
> thanks
> -- PMM
>
>
> The following changes since commit abf6e752e55b2f5afb48303429dea2db7c3a62de:
>
> Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20171030' into
> staging (2017-10-30 13:02:45 +0000)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20171031
>
> for you to fetch changes up to 168df2dea701bbf3118bdfea7794369dfa694d3d:
>
> hw/pci-host/gpex: Improve INTX to gsi routing error checking (2017-10-31
> 11:50:52 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * fix instruction-length bit in syndrome for WFI/WFE traps
> * xlnx-zcu102: Specify the max number of CPUs
> * msf2: Remove dead code reported by Coverity
> * msf2: Wire up SYSRESETREQ in SoC for system reset
> * hw/pci-host/gpex: Improve INTX to gsi routing error checking
>
Applied, thanks.
-- PMM
- [Qemu-devel] [PULL 0/5] target-arm queue, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 5/5] hw/pci-host/gpex: Improve INTX to gsi routing error checking, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 3/5] msf2: Remove dead code reported by Coverity, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 4/5] msf2: Wire up SYSRESETREQ in SoC for system reset, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 1/5] fix WFI/WFE length in syndrome register, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 2/5] xlnx-zcu102: Specify the max number of CPUs, Peter Maydell, 2017/10/31
- Re: [Qemu-devel] [PULL 0/5] target-arm queue,
Peter Maydell <=