[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 14/17] e500: split mpc8544ds specific initialization
From: |
Michael Davidsaver |
Subject: |
[Qemu-devel] [PATCH 14/17] e500: split mpc8544ds specific initialization |
Date: |
Sun, 26 Nov 2017 15:59:12 -0600 |
split off the remaining board specific parts
of e500_init() as mpc85xx_init() which
will be used by the existing
mpc8544ds and generic e500 boards.
Signed-off-by: Michael Davidsaver <address@hidden>
---
hw/ppc/e500.c | 49 ++++++++++++++++++++++++++++++++-----------------
hw/ppc/e500.h | 3 ++-
hw/ppc/e500plat.c | 2 +-
hw/ppc/mpc8544ds.c | 2 +-
4 files changed, 36 insertions(+), 20 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index b0c8495aef..0ac7cdf6a1 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -690,7 +690,32 @@ static void ppce500_power_off(void *opaque, int line, int
on)
}
}
-void ppce500_init(MachineState *machine, PPCE500Params *params)
+
+void ppce500_init(MachineState *machine, uint32_t decrementer_freq)
+{
+ int i;
+ for (i = 0; i < smp_cpus; i++) {
+ PowerPCCPU *cpu;
+ CPUState *cs;
+ CPUPPCState *env;
+
+ cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
+ env = &cpu->env;
+ cs = CPU(cpu);
+
+ if (env->mmu_model != POWERPC_MMU_BOOKE206) {
+ error_report("MMU model %i not supported by this machine.",
+ env->mmu_model);
+ exit(1);
+ }
+
+ env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
+
+ ppc_booke_timers_init(cpu, decrementer_freq, PPC_TIMER_E500);
+ }
+}
+
+void mpc85xx_init(MachineState *machine, PPCE500Params *params)
{
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
@@ -716,31 +741,21 @@ void ppce500_init(MachineState *machine, PPCE500Params
*params)
CPUPPCState *firstenv = NULL;
MemoryRegion *ccsr_addr_space;
SysBusDevice *s;
+ CPUState *cs;
- for (i = 0; i < smp_cpus; i++) {
+ ppce500_init(machine, 400000000);
+
+ CPU_FOREACH(cs) {
PowerPCCPU *cpu;
- CPUState *cs;
- cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
+ cpu = POWERPC_CPU(cs);
env = &cpu->env;
- cs = CPU(cpu);
- if (env->mmu_model != POWERPC_MMU_BOOKE206) {
- fprintf(stderr, "MMU model %i not supported by this machine.\n",
- env->mmu_model);
- exit(1);
- }
+ /* Register reset handler */
if (!firstenv) {
firstenv = env;
- }
- env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
-
- ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);
-
- /* Register reset handler */
- if (!i) {
/* Primary CPU */
struct boot_info *boot_info;
boot_info = g_malloc0(sizeof(struct boot_info));
diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h
index 70ba1d8f4f..350be17462 100644
--- a/hw/ppc/e500.h
+++ b/hw/ppc/e500.h
@@ -24,7 +24,8 @@ typedef struct PPCE500Params {
hwaddr spin_base;
} PPCE500Params;
-void ppce500_init(MachineState *machine, PPCE500Params *params);
+void ppce500_init(MachineState *machine, uint32_t decrementer_freq);
+void mpc85xx_init(MachineState *machine, PPCE500Params *params);
hwaddr booke206_page_size_to_tlb(uint64_t size);
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index e59e80fb9e..103efc68c2 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -55,7 +55,7 @@ static void e500plat_init(MachineState *machine)
params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
}
- ppce500_init(machine, ¶ms);
+ mpc85xx_init(machine, ¶ms);
}
static void e500plat_machine_init(MachineClass *mc)
diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c
index 1717953ec7..7de4ed8ae2 100644
--- a/hw/ppc/mpc8544ds.c
+++ b/hw/ppc/mpc8544ds.c
@@ -47,7 +47,7 @@ static void mpc8544ds_init(MachineState *machine)
exit(1);
}
- ppce500_init(machine, ¶ms);
+ mpc85xx_init(machine, ¶ms);
}
--
2.11.0
- Re: [Qemu-devel] [PATCH 03/17] i2c: add mpc8540 i2c controller, (continued)
- [Qemu-devel] [PATCH 01/17] openpic: debug w/ info_report(), Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 07/17] e500: fix pci host bridge class/type, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 05/17] timer: generalize Dallas/Maxim RTC i2c devices, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 11/17] e500: derive baud from CCB clock, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 06/17] tests: rewrite testing for DS RTC devices, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 09/17] e500: move mpic under CCSR, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 10/17] e500: move uarts CCSR, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 14/17] e500: split mpc8544ds specific initialization,
Michael Davidsaver <=
- [Qemu-devel] [PATCH 08/17] e500: additional CCSR registers, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 12/17] e500: add i2c controller to CCSR, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 13/17] e500: move PCI host bridge into CCSR, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 17/17] tests: add mvme3100-test, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 16/17] tests: run ds-rtc-i2c-test w/ ppc/mvme3100, Michael Davidsaver, 2017/11/26
- [Qemu-devel] [PATCH 15/17] ppc: add mvme3100 machine, Michael Davidsaver, 2017/11/26