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[Qemu-devel] [PULL 19/24] spapr: fix LSI interrupt specifiers in the dev
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 19/24] spapr: fix LSI interrupt specifiers in the device tree |
Date: |
Fri, 15 Dec 2017 16:54:30 +1100 |
From: Greg Kurz <address@hidden>
LoPAPR 1.1 B.6.9.1.2 describes the "#interrupt-cells" property of the
PowerPC External Interrupt Source Controller node as follows:
“#interrupt-cells”
Standard property name to define the number of cells in an interrupt-
specifier within an interrupt domain.
prop-encoded-array: An integer, encoded as with encode-int, that denotes
the number of cells required to represent an interrupt specifier in its
child nodes.
The value of this property for the PowerPC External Interrupt option shall
be 2. Thus all interrupt specifiers (as used in the standard “interrupts”
property) shall consist of two cells, each containing an integer encoded
as with encode-int. The first integer represents the interrupt number the
second integer is the trigger code: 0 for edge triggered, 1 for level
triggered.
This patch fixes the interrupt specifiers in the "interrupt-map" property
of the PHB node, that were setting the second cell to 8 (confusion with
IRQ_TYPE_LEVEL_LOW ?) instead of 1.
VIO devices and RTAS event sources use the same format for interrupt
specifiers: while here, we introduce a common helper to handle the
encoding details.
Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Tested-by: Cédric Le Goater <address@hidden>
--
v3: - reference public LoPAPR instead of internal PAPR+ in changelog
- change helper name to spapr_dt_xics_irq()
v2: - drop the erroneous changes to the "interrupts" prop in PCI device nodes
- introduce a common helper to encode interrupt specifiers
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_events.c | 3 +--
hw/ppc/spapr_pci.c | 3 +--
hw/ppc/spapr_vio.c | 3 ++-
include/hw/ppc/spapr.h | 10 ++++++++++
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c
index 7dc87fc7bd..c7a64e6b8d 100644
--- a/hw/ppc/spapr_events.c
+++ b/hw/ppc/spapr_events.c
@@ -282,8 +282,7 @@ void spapr_dt_events(sPAPRMachineState *spapr, void *fdt)
continue;
}
- interrupts[0] = cpu_to_be32(source->irq);
- interrupts[1] = 0;
+ spapr_dt_xics_irq(interrupts, source->irq, false);
_FDT(node_offset = fdt_add_subnode(fdt, event_sources, source_name));
_FDT(fdt_setprop(fdt, node_offset, "interrupts", interrupts,
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 39134f0ef0..88797b3d36 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -2121,8 +2121,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb,
irqmap[2] = 0;
irqmap[3] = cpu_to_be32(j+1);
irqmap[4] = cpu_to_be32(xics_phandle);
- irqmap[5] = cpu_to_be32(phb->lsi_table[lsi_num].irq);
- irqmap[6] = cpu_to_be32(0x8);
+ spapr_dt_xics_irq(&irqmap[5], phb->lsi_table[lsi_num].irq, true);
}
}
/* Write interrupt map */
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index bb7ed2c537..472dd6f33a 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@ -126,8 +126,9 @@ static int vio_make_devnode(VIOsPAPRDevice *dev,
}
if (dev->irq) {
- uint32_t ints_prop[] = {cpu_to_be32(dev->irq), 0};
+ uint32_t ints_prop[2];
+ spapr_dt_xics_irq(ints_prop, dev->irq, false);
ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
sizeof(ints_prop));
if (ret < 0) {
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 6b8e04c787..14757b805e 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -590,6 +590,16 @@ void spapr_load_rtas(sPAPRMachineState *spapr, void *fdt,
hwaddr addr);
#define RTAS_EVENT_SCAN_RATE 1
+/* This helper should be used to encode interrupt specifiers when the related
+ * "interrupt-controller" node has its "#interrupt-cells" property set to 2
(ie,
+ * VIO devices, RTAS event sources and PHBs).
+ */
+static inline void spapr_dt_xics_irq(uint32_t *intspec, int irq, bool is_lsi)
+{
+ intspec[0] = cpu_to_be32(irq);
+ intspec[1] = is_lsi ? cpu_to_be32(1) : 0;
+}
+
typedef struct sPAPRTCETable sPAPRTCETable;
#define TYPE_SPAPR_TCE_TABLE "spapr-tce-table"
--
2.14.3
- [Qemu-devel] [PULL 09/24] e500: fix pci host bridge class/type, (continued)
- [Qemu-devel] [PULL 09/24] e500: fix pci host bridge class/type, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 16/24] spapr: introduce a spapr_irq_set_lsi() helper, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 13/24] ppc/xics: introduce an icp_create() helper, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 20/24] spapr_events: drop bogus cell from "interrupt-ranges" property, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 07/24] pcc: define the Power-saving mode Exit Cause Enable bits in PowerPCCPUClass, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 14/24] ppc/xics: assign of the CPU 'intc' pointer under the core, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 15/24] spapr: move the IRQ allocation routines under the machine, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 08/24] openpic: debug w/ info_report(), David Gibson, 2017/12/15
- [Qemu-devel] [PULL 18/24] spapr: replace numa_get_node() with lookup in pc-dimm list, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 22/24] spapr: Rename machine init functions for clarity, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 19/24] spapr: fix LSI interrupt specifiers in the device tree,
David Gibson <=
- [Qemu-devel] [PULL 24/24] spapr: don't initialize PATB entry if max-cpu-compat < power9, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 21/24] target/ppc: introduce the PPC_BIT() macro, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 23/24] spapr: Assume msi_nonbroken, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 11/24] spapr/rtas: fix reboot of a a SMP TCG guest, David Gibson, 2017/12/15
- [Qemu-devel] [PULL 17/24] spapr: introduce a spapr_qirq() helper, David Gibson, 2017/12/15
- Re: [Qemu-devel] [PULL 00/24] ppc-for-2.12 queue 20171215, Peter Maydell, 2017/12/15