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[Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state()
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state() |
Date: |
Tue, 2 Jan 2018 02:10:32 +0100 |
Display correctly the Trace bits for 680x0
(2 bits instead of 1 for Coldfire).
Signed-off-by: Laurent Vivier <address@hidden>
---
target/m68k/cpu.h | 3 ++-
target/m68k/translate.c | 9 ++++++---
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index fdb780c81c..41714d8fd6 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -218,7 +218,8 @@ typedef enum {
#define SR_I 0x0700
#define SR_M 0x1000
#define SR_S 0x2000
-#define SR_T 0x8000
+#define SR_T_SHIFT 14
+#define SR_T 0xc000
#define M68K_SSP 0
#define M68K_USP 1
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index bd43e60a23..a7937de8d0 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5997,9 +5997,12 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf,
}
cpu_fprintf (f, "PC = %08x ", env->pc);
sr = env->sr | cpu_m68k_get_ccr(env);
- cpu_fprintf(f, "SR = %04x %c%c%c%c%c ", sr, (sr & CCF_X) ? 'X' : '-',
- (sr & CCF_N) ? 'N' : '-', (sr & CCF_Z) ? 'Z' : '-',
- (sr & CCF_V) ? 'V' : '-', (sr & CCF_C) ? 'C' : '-');
+ cpu_fprintf(f, "SR = %04x T:%x I:%x %c%c %c%c%c%c%c\n",
+ sr, (sr & SR_T) >> SR_T_SHIFT, (sr & SR_I) >> SR_I_SHIFT,
+ (sr & SR_S) ? 'S' : 'U', (sr & SR_M) ? '%' : 'I',
+ (sr & CCF_X) ? 'X' : '-', (sr & CCF_N) ? 'N' : '-',
+ (sr & CCF_Z) ? 'Z' : '-', (sr & CCF_V) ? 'V' : '-',
+ (sr & CCF_C) ? 'C' : '-');
cpu_fprintf(f, "FPSR = %08x %c%c%c%c ", env->fpsr,
(env->fpsr & FPSR_CC_A) ? 'A' : '-',
(env->fpsr & FPSR_CC_I) ? 'I' : '-',
--
2.14.3
- [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb(), (continued)
- [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb(), Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state(),
Laurent Vivier <=
- [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset, Laurent Vivier, 2018/01/01
- [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR, Laurent Vivier, 2018/01/01