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Re: [Qemu-devel] [PATCH v1 for-2-12 08/15] s390x/flic: make floating int


From: Cornelia Huck
Subject: Re: [Qemu-devel] [PATCH v1 for-2-12 08/15] s390x/flic: make floating interrupts on TCG actually floating
Date: Tue, 9 Jan 2018 17:42:29 +0100

On Mon, 11 Dec 2017 14:47:33 +0100
David Hildenbrand <address@hidden> wrote:

> Move floating interrupt handling into the flic. Floating interrupts
> will now be considered by all CPUs, not just CPU #0. While at it, convert
> I/O interrupts to use a list and make sure we properly consider I/O
> sub-classes in s390_cpu_has_io_int().
> 
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
>  hw/intc/s390_flic.c          | 144 
> ++++++++++++++++++++++++++++++++++++++++---
>  include/hw/s390x/s390_flic.h |  41 ++++++++++++
>  target/s390x/cpu.c           |   8 ---
>  target/s390x/cpu.h           |  22 -------
>  target/s390x/excp_helper.c   |  97 ++++++++++-------------------
>  target/s390x/interrupt.c     |  52 ++--------------
>  6 files changed, 212 insertions(+), 152 deletions(-)
> 

> diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h
> index d0538134b7..9be0b9ab11 100644
> --- a/include/hw/s390x/s390_flic.h
> +++ b/include/hw/s390x/s390_flic.h
> @@ -16,6 +16,7 @@
>  #include "hw/sysbus.h"
>  #include "hw/s390x/adapter.h"
>  #include "hw/virtio/virtio.h"
> +#include "qemu/queue.h"
>  
>  /*
>   * Reserve enough gsis to accommodate all virtio devices.
> @@ -85,12 +86,52 @@ typedef struct S390FLICStateClass {
>  #define SIC_IRQ_MODE_SINGLE 1
>  #define AIS_MODE_MASK(isc) (0x80 >> isc)
>  
> +#define ISC_TO_PENDING_IO(_isc) (0x80 >> (_isc))
> +#define CR6_TO_PENDING_IO(_cr6) (((_cr6) >> 24) & 0xff)
> +
> +/* the ISC bits are organized in a way that above makros work */

/* organize the ISC bits so that the macros above work */

?

> +#define FLIC_PENDING_IO_ISC7            (1 << 0)
> +#define FLIC_PENDING_IO_ISC6            (1 << 1)
> +#define FLIC_PENDING_IO_ISC5            (1 << 2)
> +#define FLIC_PENDING_IO_ISC4            (1 << 3)
> +#define FLIC_PENDING_IO_ISC3            (1 << 4)
> +#define FLIC_PENDING_IO_ISC2            (1 << 5)
> +#define FLIC_PENDING_IO_ISC1            (1 << 6)
> +#define FLIC_PENDING_IO_ISC0            (1 << 7)
> +#define FLIC_PENDING_SERVICE            (1 << 8)
> +#define FLIC_PENDING_MCHK_CR            (1 << 9)
> +
> +#define FLIC_PENDING_IO (FLIC_PENDING_IO_ISC0 | FLIC_PENDING_IO_ISC1 | \
> +                         FLIC_PENDING_IO_ISC2 | FLIC_PENDING_IO_ISC3 | \
> +                         FLIC_PENDING_IO_ISC4 | FLIC_PENDING_IO_ISC5 | \
> +                         FLIC_PENDING_IO_ISC6 | FLIC_PENDING_IO_ISC7)



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