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[Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() in
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize() |
Date: |
Tue, 16 Jan 2018 13:34:10 +0000 |
From: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/sd/sdhci.c | 30 +++++++++++++++++++++---------
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 15d0961..cf0c079 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1214,6 +1214,15 @@ static void sdhci_uninitfn(SDHCIState *s)
s->fifo_buffer = NULL;
}
+static void sdhci_common_realize(SDHCIState *s, Error **errp)
+{
+ s->buf_maxsz = sdhci_get_fifolen(s);
+ s->fifo_buffer = g_malloc0(s->buf_maxsz);
+
+ memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
+ SDHC_REGISTERS_MAP_SIZE);
+}
+
static bool sdhci_pending_insert_vmstate_needed(void *opaque)
{
SDHCIState *s = opaque;
@@ -1292,14 +1301,16 @@ static Property sdhci_pci_properties[] = {
static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
{
SDHCIState *s = PCI_SDHCI(dev);
+
+ sdhci_initfn(s);
+ sdhci_common_realize(s, errp);
+ if (errp && *errp) {
+ return;
+ }
+
dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */
dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */
- sdhci_initfn(s);
- s->buf_maxsz = sdhci_get_fifolen(s);
- s->fifo_buffer = g_malloc0(s->buf_maxsz);
s->irq = pci_allocate_irq(dev);
- memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
- SDHC_REGISTERS_MAP_SIZE);
pci_register_bar(dev, 0, 0, &s->iomem);
}
@@ -1362,11 +1373,12 @@ static void sdhci_sysbus_realize(DeviceState *dev,
Error ** errp)
SDHCIState *s = SYSBUS_SDHCI(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- s->buf_maxsz = sdhci_get_fifolen(s);
- s->fifo_buffer = g_malloc0(s->buf_maxsz);
+ sdhci_common_realize(s, errp);
+ if (errp && *errp) {
+ return;
+ }
+
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
- SDHC_REGISTERS_MAP_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
}
--
2.7.4
- [Qemu-devel] [PULL 00/24] target-arm queue, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 10/24] target/arm: Add fp16 support to vfp_expand_imm, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 12/24] sdhci: remove dead code, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 03/24] hw/arm/virt: Add virt-2.12 machine type, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 07/24] hw/sd/ssi-sd: Reset SD card on controller reset, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 04/24] target/arm: Handle page table walk load failures correctly, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 19/24] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h", Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 09/24] target/arm: Split out vfp_expand_imm, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize(),
Peter Maydell <=
- [Qemu-devel] [PULL 06/24] hw/sd/milkymist-memcard: Reset SD card on controller reset, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 02/24] get_phys_addr_pmsav7: Support AP=0b111 for v7M, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 08/24] hw/sd/omap_mmc: Reset SD card on controller reset, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 05/24] hw/sd/pl181: Reset SD card on controller reset, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 13/24] sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 14/24] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init(), Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 20/24] sdhci: rename the SDHC_CAPAB register, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 23/24] sdhci: fix the PCI device, using the PCI address space for DMA, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 22/24] sdhci: Implement write method of ACMD12ERRSTS register, Peter Maydell, 2018/01/16
- [Qemu-devel] [PULL 21/24] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only, Peter Maydell, 2018/01/16