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Re: [Qemu-devel] MTTCG External Halt


From: Alistair Francis
Subject: Re: [Qemu-devel] MTTCG External Halt
Date: Wed, 31 Jan 2018 11:37:42 -0800

On Wed, Jan 31, 2018 at 10:59 AM, Peter Maydell
<address@hidden> wrote:
> On 31 January 2018 at 18:51, Alistair Francis <address@hidden> wrote:
>> On Wed, Jan 31, 2018 at 10:48 AM, Peter Maydell
>> <address@hidden> wrote:
>>> On 31 January 2018 at 18:17, Alistair Francis <address@hidden> wrote:
>>>> On Wed, Jan 31, 2018 at 9:13 AM, Paolo Bonzini <address@hidden> wrote:
>>>>> cpu->halted = false likewise should not be needed here, but you cannot
>>>>> just clear CPU_INTERRUPT_HALT either.  You need to set a *different*
>>>>> interrupt request bit (the dummy CPU_INTERRUPT_EXITTB will do) and
>>>>> cpu_handle_halt will clear cpu->halted.
>>>>
>>>> The problem with that is that I hit this assert for ARM CPUs:
>>>>
>>>> qemu-system-aarch64: ./target/arm/cpu.h:1446: arm_el_is_aa64:
>>>> Assertion `el >= 1 && el <= 3' failed.
>>>
>>> Backtrace from when you hit that might be useful...
>>
>> Here it is:
>>
>> (gdb) bt
>> #0  0x00007ffff1a030bb in __GI_raise (address@hidden) at
>> ../sysdeps/unix/sysv/linux/raise.c:51
>> #1  0x00007ffff1a04f5d in __GI_abort () at abort.c:90
>> #2  0x00007ffff19faf17 in __assert_fail_base (fmt=<optimized out>,
>> address@hidden "el >= 1 && el <= 3",
>> address@hidden
>> "/scratch/alistai/master-qemu/target/arm/cpu.h", address@hidden,
>> address@hidden <__PRETTY_FUNCTION__.24916>
>> "arm_el_is_aa64") at assert.c:92
>> #3  0x00007ffff19fafc2 in __GI___assert_fail
>> (address@hidden "el >= 1 && el <= 3",
>> address@hidden
>> "/scratch/alistai/master-qemu/target/arm/cpu.h", address@hidden,
>> address@hidden <__PRETTY_FUNCTION__.24916>
>> "arm_el_is_aa64") at assert.c:101
>> #4  0x00005555557eb872 in arm_el_is_aa64 (el=0, env=0x55555723c7f8) at
>> /scratch/alistai/master-qemu/target/arm/cpu.h:1446
>> #5  0x0000555555951233 in arm_el_is_aa64 (el=0, env=0x55555723c7f8) at
>> /scratch/alistai/master-qemu/target/arm/cpu.h:1838
>> #6  0x0000555555951233 in arm_cpu_do_interrupt (cs=0x555557234550) at
>> /scratch/alistai/master-qemu/target/arm/helper.c:8020
>
> The problem is here (or further down the callstack) -- you
> definitely don't want to be trying to take an interrupt from
> the guest's perspective, which is what arm_cpu_do_interrupt()
> is for...
>
> This is probably happening because cpu->exception_index isn't
> right at this point (though the arm code has a habit of leaving
> it set to whatever its value was last...)

Ok, adding a cpu->exception_index = -1 seems to fix the assert.

Thanks for that Peter.

Now I'm just left with a hang :(

Alistair

>
>> #7  0x000055555585e75b in cpu_handle_exception (ret=<synthetic
>> pointer>, cpu=0x555556c64200)
>>     at /scratch/alistai/master-qemu/accel/tcg/cpu-exec.c:532
>> #8  0x000055555585e75b in cpu_exec (address@hidden) at
>> /scratch/alistai/master-qemu/accel/tcg/cpu-exec.c:748
>> #9  0x000055555582d963 in tcg_cpu_exec (cpu=0x555557234550) at
>> /scratch/alistai/master-qemu/cpus.c:1297
>> #10 0x000055555582d963 in qemu_tcg_cpu_thread_fn (arg=0x555557234550)
>> at /scratch/alistai/master-qemu/cpus.c:1502
>> #11 0x00007ffff1db37fc in start_thread (arg=0x7ffef6b43700) at
>> pthread_create.c:465
>> #12 0x00007ffff1ae0b5f in clone () at
>> ../sysdeps/unix/sysv/linux/x86_64/clone.S:95
>
> thanks
> -- PMM



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