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[Qemu-devel] [PATCH v9 03/29] exec: add debug version of physical memory
From: |
Brijesh Singh |
Subject: |
[Qemu-devel] [PATCH v9 03/29] exec: add debug version of physical memory read and write API |
Date: |
Thu, 15 Feb 2018 09:39:29 -0600 |
Adds the following new APIs
- cpu_physical_memory_read_debug
- cpu_physical_memory_write_debug
- cpu_physical_memory_rw_debug
- ldl_phys_debug
- ldq_phys_debug
Cc: Paolo Bonzini <address@hidden>
Cc: Peter Crosthwaite <address@hidden>
Cc: Richard Henderson <address@hidden>
Signed-off-by: Brijesh Singh <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
---
exec.c | 40 ++++++++++++++++++++++++++++++++++++++++
include/exec/cpu-common.h | 15 +++++++++++++++
2 files changed, 55 insertions(+)
diff --git a/exec.c b/exec.c
index b1366f85b07b..bc7a63fbc2f4 100644
--- a/exec.c
+++ b/exec.c
@@ -3592,6 +3592,46 @@ void address_space_cache_destroy(MemoryRegionCache
*cache)
#define RCU_READ_UNLOCK() rcu_read_unlock()
#include "memory_ldst.inc.c"
+uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr)
+{
+ MemTxAttrs attrs;
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ uint32_t val;
+
+ /* set debug attrs to indicate memory access is from the debugger */
+ attrs.debug = 1;
+
+ address_space_rw(cpu->cpu_ases[asidx].as, addr, attrs,
+ (void *) &val, 4, 0);
+
+ return tswap32(val);
+}
+
+uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr)
+{
+ MemTxAttrs attrs;
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ uint64_t val;
+
+ /* set debug attrs to indicate memory access is from the debugger */
+ attrs.debug = 1;
+
+ address_space_rw(cpu->cpu_ases[asidx].as, addr, attrs,
+ (void *) &val, 8, 0);
+ return val;
+}
+
+void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
+ int len, int is_write)
+{
+ MemTxAttrs attrs;
+
+ /* set debug attrs to indicate memory access is from the debugger */
+ attrs.debug = 1;
+
+ address_space_rw(&address_space_memory, addr, attrs, buf, len, is_write);
+}
+
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf, int len, int is_write)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 74341b19d26a..fa01385d4f1b 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -77,11 +77,26 @@ size_t qemu_ram_pagesize_largest(void);
void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
int len, int is_write);
+void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
+ int len, int is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, int len)
{
cpu_physical_memory_rw(addr, buf, len, 0);
}
+static inline void cpu_physical_memory_read_debug(hwaddr addr,
+ void *buf, int len)
+{
+ cpu_physical_memory_rw_debug(addr, buf, len, 0);
+}
+static inline void cpu_physical_memory_write_debug(hwaddr addr,
+ const void *buf, int len)
+{
+ cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1);
+}
+uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr);
+uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr);
+
static inline void cpu_physical_memory_write(hwaddr addr,
const void *buf, int len)
{
--
2.14.3
- [Qemu-devel] [PATCH v9 00/29] x86: Secure Encrypted Virtualization (AMD), Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 01/29] memattrs: add debug attribute, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 05/29] machine: add -memory-encryption property, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 03/29] exec: add debug version of physical memory read and write API,
Brijesh Singh <=
- [Qemu-devel] [PATCH v9 04/29] monitor/i386: use debug APIs when accessing guest memory, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 06/29] kvm: update kvm.h to include memory encryption ioctls, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 02/29] exec: add ram_debug_ops support, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 08/29] target/i386: add Secure Encrypted Virtulization (SEV) object, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 07/29] docs: add AMD Secure Encrypted Virtualization (SEV), Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 09/29] qmp: add query-sev command, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 10/29] sev/i386: add command to initialize the memory encryption context, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 12/29] sev/i386: register the guest memory range which may contain encrypted data, Brijesh Singh, 2018/02/15
- [Qemu-devel] [PATCH v9 11/29] qmp: populate SevInfo fields with SEV guest information, Brijesh Singh, 2018/02/15