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Re: [Qemu-devel] [PATCH v2 20/32] arm/translate-a64: add FP16 FCMxx (zer


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v2 20/32] arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16
Date: Thu, 22 Feb 2018 11:40:06 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0

On 02/22/2018 09:23 AM, Alex Bennée wrote:
> 
> Richard Henderson <address@hidden> writes:
> 
>> On 02/08/2018 09:31 AM, Alex Bennée wrote:
>>> +            maxpasses = hp ? (is_q ? 8 : 4) : (is_q ? 4 : 2);
>>
>>   (8 << is_q) >> size
>>
>> ?
> 
> Hmm I'm not so sure about this. While mine is longer form at least the
> intent is clear. What about:
> 
>     maxpasses = (is_q ? 4 : 2) << hp
> 
> It's still a little magical IMHO though...

Two variables then?

  vector_size = 8 << is_q;
  maxpasses = vector_size >> size;

Why do you want the "hp" variable when you already have "size"?


r~



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