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Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/spa
From: |
Michael Clark |
Subject: |
Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/sparc/mips/s390x/openrisc targets |
Date: |
Tue, 6 Mar 2018 12:57:13 +1300 |
On Fri, Mar 2, 2018 at 11:53 AM, Emilio G. Cota <address@hidden> wrote:
> [ What is this all about? See this message:
> http://lists.gnu.org/archive/html/qemu-devel/2018-02/msg04785.html ]
>
> Merged the separate patchsets I sent in the last couple of weeks into
> one set. This will be easier to merge since it will avoid potential
> merge conflicts due to adding max_insns to dc->base.
>
> Changes since sending the separate series for
> sh4/sparc/mips/s390x/openrisc:
> - Rebased on top of master (669743979)
> - Added R-b's
> - sh4: no changes since v3
> - mips: no changes (no reviews yet!)
> - sparc:
> + Use base.singlestep_enabled and singlestep like in other targets,
> e.g. Alpha.
> + Remove the unnecessary
> (dc.pc - pc_start) < (TARGET_PAGE_SIZE - 32))
> check.
> - s390x:
> + Remove dc->pc, use pc_next instead as David suggested.
> + Use dc for DisasContext instead of s.
> + Compute next_page in translate_insn instead of keeping it in dc.
> + Looked into dropping dc->do_debug, but don't see an easy way to do so.
> - openrisc:
> + Consistently use DISAS_NORETURN after generating an
> exception; fixed the two call sites that Richard pointed out,
> plus a couple of others that weren't visible in the previous patch.
> + Remove the dc->next_page_start field; instead, set the max_insn
> bound in translate_insn.
>
> You can fetch this series from:
> https://github.com/cota/qemu/tree/trloop-conv-v1
Curious to know what we would need to change in RISC-V translate.c:
-
https://github.com/riscv/riscv-qemu/blob/qemu-upstream-v8/target/riscv/translate.c
I'm going to make a v8.1 branch and tag that is a rebase of the v8 patch
series against current QEMU master, and hopefully we get the RISC-V port
merged before the soft-freeze. Fingers crossed.
Diffstat below.
>
> Thanks,
>
> Emilio
>
> accel/tcg/translator.c | 21 +-
> include/exec/translator.h | 8 +-
> target/alpha/translate.c | 6 +-
> target/arm/translate-a64.c | 8 +-
> target/arm/translate.c | 9 +-
> target/hppa/translate.c | 7 +-
> target/i386/translate.c | 5 +-
> target/mips/translate.c | 623 +++++------
> target/openrisc/translate.c | 226 ++--
> target/ppc/translate.c | 5 +-
> target/s390x/translate.c | 1527 +++++++++++++--------------
> target/sh4/translate.c | 171 +--
> target/sparc/translate.c | 207 ++--
> 13 files changed, 1401 insertions(+), 1422 deletions(-)
>
>
- [Qemu-devel] [PATCHv1 06/14] target/mips: convert to DisasJumpType, (continued)
- [Qemu-devel] [PATCHv1 06/14] target/mips: convert to DisasJumpType, Emilio G. Cota, 2018/03/01
- [Qemu-devel] [PATCHv1 07/14] target/mips: convert to DisasContextBase, Emilio G. Cota, 2018/03/01
- [Qemu-devel] [PATCHv1 10/14] target/s390x: convert to DisasJumpType, Emilio G. Cota, 2018/03/01
- Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/sparc/mips/s390x/openrisc targets, Cornelia Huck, 2018/03/02
- Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/sparc/mips/s390x/openrisc targets, Mark Cave-Ayland, 2018/03/05
- Re: [Qemu-devel] [PATCHv1 00/14] Translation loop conversion for sh4/sparc/mips/s390x/openrisc targets,
Michael Clark <=