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[Qemu-devel] [PATCH v11 25/28] cpu/i386: populate CPUID 0x8000_001F when
From: |
Brijesh Singh |
Subject: |
[Qemu-devel] [PATCH v11 25/28] cpu/i386: populate CPUID 0x8000_001F when SEV is active |
Date: |
Wed, 7 Mar 2018 10:50:35 -0600 |
When SEV is enabled, CPUID 0x8000_001F should provide additional
information regarding the feature (such as which page table bit is used
to mark the pages as encrypted etc).
The details for memory encryption CPUID is available in AMD APM
(https://support.amd.com/TechDocs/24594.pdf) Section E.4.17
Cc: Paolo Bonzini <address@hidden>
Cc: Richard Henderson <address@hidden>
Cc: Eduardo Habkost <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Brijesh Singh <address@hidden>
---
target/i386/cpu.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2c04645ceac9..647f792ba123 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -26,6 +26,7 @@
#include "sysemu/hvf.h"
#include "sysemu/cpus.h"
#include "kvm_i386.h"
+#include "sev_i386.h"
#include "qemu/error-report.h"
#include "qemu/option.h"
@@ -3612,6 +3613,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
*ecx = 0;
*edx = 0;
break;
+ case 0x8000001F:
+ *eax = sev_enabled() ? 0x2 : 0;
+ *ebx = sev_get_cbit_position();
+ *ebx |= sev_get_reduced_phys_bits() << 6;
+ *ecx = 0;
+ *edx = 0;
+ break;
default:
/* reserved values: zero */
*eax = 0;
@@ -4041,6 +4049,11 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error
**errp)
if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) {
x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A);
}
+
+ /* SEV requires CPUID[0x8000001F] */
+ if (sev_enabled()) {
+ x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F);
+ }
}
/* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */
--
2.14.3
- [Qemu-devel] [PATCH v11 11/28] sev/i386: add command to initialize the memory encryption context, (continued)
- [Qemu-devel] [PATCH v11 11/28] sev/i386: add command to initialize the memory encryption context, Brijesh Singh, 2018/03/07
- [Qemu-devel] [PATCH v11 14/28] hmp: add 'info sev' command, Brijesh Singh, 2018/03/07
- [Qemu-devel] [PATCH v11 13/28] kvm: introduce memory encryption APIs, Brijesh Singh, 2018/03/07
- [Qemu-devel] [PATCH v11 17/28] target/i386: encrypt bios rom, Brijesh Singh, 2018/03/07
- [Qemu-devel] [PATCH v11 21/28] sev/i386: add debug encrypt and decrypt commands, Brijesh Singh, 2018/03/07
[Qemu-devel] [PATCH v11 25/28] cpu/i386: populate CPUID 0x8000_001F when SEV is active,
Brijesh Singh <=
[Qemu-devel] [PATCH v11 22/28] target/i386: clear C-bit when walking SEV guest page table, Brijesh Singh, 2018/03/07
[Qemu-devel] [PATCH v11 26/28] qmp: add query-sev-capabilities command, Brijesh Singh, 2018/03/07
[Qemu-devel] [PATCH v11 27/28] sev/i386: add sev_get_capabilities(), Brijesh Singh, 2018/03/07
[Qemu-devel] [PATCH v11 24/28] sev/i386: add migration blocker, Brijesh Singh, 2018/03/07
[Qemu-devel] [PATCH v11 28/28] tests/qmp-test: blacklist sev specific qmp commands, Brijesh Singh, 2018/03/07
Re: [Qemu-devel] [PATCH v11 00/28] x86: Secure Encrypted Virtualization (AMD), no-reply, 2018/03/07