Re: [Qemu-devel] [PATCH] RISC-V: Fix isa string logic bug, use popcount to count bits

[Michael Clark]

On Sat, Mar 10, 2018 at 9:33 AM, Eric Blake <address@hidden> wrote:

> [resend, this time with proper cc's]
>
> On 03/09/2018 02:20 PM, Michael Clark wrote:
>
>> Cc: Palmer Dabbelt <address@hidden>
>> Cc: Peter Maydell <address@hidden>
>> Signed-off-by: Michael Clark <address@hidden>
>> ---
>>   target/riscv/cpu.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
>> index 4851890..f0d6d1d 100644
>> --- a/target/riscv/cpu.c
>> +++ b/target/riscv/cpu.c
>> @@ -391,7 +391,7 @@ static const TypeInfo riscv_cpu_type_info = {
>>   char *riscv_isa_string(RISCVCPU *cpu)
>>   {
>>       int i;
>> -    size_t maxlen = 5 + ctz32(cpu->env.misa);
>> +    size_t maxlen = 5 + __builtin_popcountll(cpu->env.misa);
>>       char *isa_string = g_new0(char, maxlen);
>>       snprintf(isa_string, maxlen, "rv%d", TARGET_LONG_BITS);
>>       for (i = 0; i < sizeof(riscv_exts); i++) {
>>
>
> I'd rather you used ctpop64() from host-utils.h, so we have a centralized
> place to change things just once in case we have to tweak the use of
> __builtin_popcount when targetting a different compiler.


Okay. I'll revise the patch...