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[Qemu-devel] [PATCH v2] RISC-V: Fix riscv_isa_string, use popcount to co
From: |
Michael Clark |
Subject: |
[Qemu-devel] [PATCH v2] RISC-V: Fix riscv_isa_string, use popcount to count bits |
Date: |
Sat, 10 Mar 2018 10:01:12 +1300 |
Logic bug caused the string size calculation for the RISC-V
format ISA string to be small. This fix allows slack for rv128.
Cc: Palmer Dabbelt <address@hidden>
Cc: Peter Maydell <address@hidden>
Cc: Eric Blake <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
---
target/riscv/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4851890..1456535 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -391,7 +391,7 @@ static const TypeInfo riscv_cpu_type_info = {
char *riscv_isa_string(RISCVCPU *cpu)
{
int i;
- size_t maxlen = 5 + ctz32(cpu->env.misa);
+ size_t maxlen = 8 + ctpop64(cpu->env.misa);
char *isa_string = g_new0(char, maxlen);
snprintf(isa_string, maxlen, "rv%d", TARGET_LONG_BITS);
for (i = 0; i < sizeof(riscv_exts); i++) {
--
2.7.0
- [Qemu-devel] [PATCH v2] RISC-V: Fix riscv_isa_string, use popcount to count bits,
Michael Clark <=