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[Qemu-devel] [PULL 05/13] hw/arm/raspi: Don't do board-setup or secure-b
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/13] hw/arm/raspi: Don't do board-setup or secure-boot for raspi3 |
Date: |
Mon, 19 Mar 2018 18:34:07 +0000 |
For the rpi1 and 2 we want to boot the Linux kernel via some
custom setup code that makes sure that the SMC instruction
acts as a no-op, because it's used for cache maintenance.
The rpi3 boots AArch64 kernels, which don't need SMC for
cache maintenance and always expect to be booted non-secure.
Don't fill in the aarch32-specific parts of the binfo struct.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Andrew Baumann <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
---
hw/arm/raspi.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index a37881433c..1ac0737149 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -82,10 +82,19 @@ static void setup_boot(MachineState *machine, int version,
size_t ram_size)
binfo.board_id = raspi_boardid[version];
binfo.ram_size = ram_size;
binfo.nb_cpus = smp_cpus;
- binfo.board_setup_addr = BOARDSETUP_ADDR;
- binfo.write_board_setup = write_board_setup;
- binfo.secure_board_setup = true;
- binfo.secure_boot = true;
+
+ if (version <= 2) {
+ /* The rpi1 and 2 require some custom setup code to run in Secure
+ * mode before booting a kernel (to set up the SMC vectors so
+ * that we get a no-op SMC; this is used by Linux to call the
+ * firmware for some cache maintenance operations.
+ * The rpi3 doesn't need this.
+ */
+ binfo.board_setup_addr = BOARDSETUP_ADDR;
+ binfo.write_board_setup = write_board_setup;
+ binfo.secure_board_setup = true;
+ binfo.secure_boot = true;
+ }
/* Pi2 and Pi3 requires SMP setup */
if (version >= 2) {
--
2.16.2
- [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 01/13] fsl-imx6: Swap Ethernet interrupt defines, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 02/13] dump: Update correct kdump phys_base field for AArch64, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 03/13] char: i.MX: Simplify imx_update(), Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 05/13] hw/arm/raspi: Don't do board-setup or secure-boot for raspi3,
Peter Maydell <=
- [Qemu-devel] [PULL 04/13] char: i.MX: Add support for "TX complete" interrupt, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 06/13] hw/arm/boot: assert that secure_boot and secure_board_setup are false for AArch64, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 07/13] hw/arm/boot: If booting a kernel in EL2, set SCR_EL3.HCE, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 08/13] hw/arm/bcm2386: Fix parent type of bcm2386, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 09/13] hw/arm/bcm2836: Rename bcm2836 type/struct to bcm283x, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 10/13] hw/arm/bcm2836: Create proper bcm2837 device, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 11/13] hw/arm/bcm2836: Use correct affinity values for BCM2837, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 12/13] hw/arm/bcm2836: Hardcode correct CPU type, Peter Maydell, 2018/03/19
- [Qemu-devel] [PULL 13/13] hw/arm/raspi: Provide spin-loop code for AArch64 CPUs, Peter Maydell, 2018/03/19
- Re: [Qemu-devel] [PULL 00/13] target-arm queue, Peter Maydell, 2018/03/20