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Re: [Qemu-devel] [PATCH v1] RISC-V: RISC-V TCG backend work in progress
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v1] RISC-V: RISC-V TCG backend work in progress |
Date: |
Wed, 28 Mar 2018 08:35:45 +0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 03/28/2018 01:43 AM, Michael Clark wrote:
> > + if ((ct & TCG_CT_CONST_N12) && val >= -2047 && val <= 2047) {
>
> +2048?
>
> We use this constraint for a negatable immediate and the constraint is only
> applied to sub. We have no subi, so we implement subi as addi rd, rs1, -imm
>
> case INDEX_op_sub_i32:
> if (c2) {
> tcg_out_opc_imm(s, is32bit ? OPC_ADDI : OPC_ADDIW, a0, a1, -a2);
> } else {
> tcg_out_opc_reg(s, is32bit ? OPC_SUB : OPC_SUBW, a0, a1, a2);
> }
> break;
That's my point. The "positive" range for addition is -2048...2047, so the
"negative" range for subtraction should be -2047...2048.
r~