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[Qemu-devel] [PATCH v1 4/5] target-microblaze: mmu: Make TLBSX write-onl
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v1 4/5] target-microblaze: mmu: Make TLBSX write-only |
Date: |
Thu, 19 Apr 2018 13:21:30 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Make TLBSX write-only and guest-error log reads from it.
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/mmu.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index a0f06758f8..8391811900 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -182,7 +182,7 @@ done:
uint32_t mmu_read(CPUMBState *env, uint32_t rn)
{
unsigned int i;
- uint32_t r;
+ uint32_t r = 0;
if (env->mmu.c_mmu < 2 || !env->mmu.c_mmu_tlb_access) {
qemu_log_mask(LOG_GUEST_ERROR, "MMU access on MMU-less system\n");
@@ -211,6 +211,9 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
}
r = env->mmu.regs[rn];
break;
+ case MMU_R_TLBSX:
+ qemu_log_mask(LOG_GUEST_ERROR, "TLBSX is write-only.\n");
+ break;
default:
r = env->mmu.regs[rn];
break;
--
2.14.1
[Qemu-devel] [PATCH v1 3/5] target-microblaze: Don't clobber the IMM reg for ld/st reversed, Edgar E. Iglesias, 2018/04/19
[Qemu-devel] [PATCH v1 4/5] target-microblaze: mmu: Make TLBSX write-only,
Edgar E. Iglesias <=
[Qemu-devel] [PATCH v1 2/5] target-microblaze: Fix trap checks for FPU insns, Edgar E. Iglesias, 2018/04/19
[Qemu-devel] [PATCH v1 5/5] target-microblaze: mmu: Make the TLBX MISS bit read-only, Edgar E. Iglesias, 2018/04/19