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[Qemu-devel] [PATCH 1/9] target/arm: Implement vector shifted SCVF/UCVF
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 1/9] target/arm: Implement vector shifted SCVF/UCVF for fp16 |
Date: |
Tue, 24 Apr 2018 15:22:52 -1000 |
While we have some of the scalar paths for *CVF for fp16,
we failed to decode the fp16 version of these instructions.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate-a64.c | 33 ++++++++++++++++++++-------------
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index b47319d437..c92e052686 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -7077,13 +7077,26 @@ static void handle_simd_shift_intfp_conv(DisasContext
*s, bool is_scalar,
int immh, int immb, int opcode,
int rn, int rd)
{
- bool is_double = extract32(immh, 3, 1);
- int size = is_double ? MO_64 : MO_32;
- int elements;
+ int size, elements, fracbits;
int immhb = immh << 3 | immb;
- int fracbits = (is_double ? 128 : 64) - immhb;
- if (!extract32(immh, 2, 2)) {
+ if (immh & 8) {
+ size = MO_64;
+ if (!is_scalar && !is_q) {
+ unallocated_encoding(s);
+ return;
+ }
+ } else if (immh & 4) {
+ size = MO_32;
+ } else if (immh & 2) {
+ size = MO_16;
+ if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {
+ unallocated_encoding(s);
+ return;
+ }
+ } else {
+ /* immh == 0 would be a failure of the decode logic */
+ g_assert(immh == 1);
unallocated_encoding(s);
return;
}
@@ -7091,20 +7104,14 @@ static void handle_simd_shift_intfp_conv(DisasContext
*s, bool is_scalar,
if (is_scalar) {
elements = 1;
} else {
- elements = is_double ? 2 : is_q ? 4 : 2;
- if (is_double && !is_q) {
- unallocated_encoding(s);
- return;
- }
+ elements = 8 << is_q >> size;
}
+ fracbits = (16 << size) - immhb;
if (!fp_access_check(s)) {
return;
}
- /* immh == 0 would be a failure of the decode logic */
- g_assert(immh);
-
handle_simd_intfp_conv(s, rd, rn, elements, !is_u, fracbits, size);
}
--
2.14.3
- [Qemu-devel] [PATCH 0/9] target/arm: Fixups for ARM_FEATURE_V8_FP16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 5/9] target/arm: Implement FMOV (general) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 7/9] target/arm: Implement FCVT (scalar, fixed-point) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 8/9] target/arm: Implement FP data-processing (2 source) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 6/9] target/arm: Implement FCVT (scalar, integer) for fp16, Richard Henderson, 2018/04/24
- [Qemu-devel] [PATCH 9/9] target/arm: Implement FP data-processing (3 source) for fp16, Richard Henderson, 2018/04/24