Re: [Qemu-devel] [PATCH v8 19/35] RISC-V: Allow S-mode mxr access when priv ISA >= v1.10

[Alistair Francis]

On Wed, Apr 25, 2018 at 5:10 PM Michael Clark <address@hidden> wrote:

> The mstatus.MXR alias in sstatus should only be writable
> by S-mode if the privileged ISA version >= v1.10. Also MXR
> was masked in sstatus CSR read but not sstatus CSR writes.
> Now we correctly mask sstatus.mxr in both read and write.

> Cc: Sagar Karandikar <address@hidden>
> Cc: Bastian Koppelmann <address@hidden>
> Cc: Palmer Dabbelt <address@hidden>
> Cc: Alistair Francis <address@hidden>
> Signed-off-by: Michael Clark <address@hidden>

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>   target/riscv/op_helper.c | 7 +++++--
>   1 file changed, 5 insertions(+), 2 deletions(-)

> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index b81b9b6..88c263a 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -236,7 +236,10 @@ void csr_write_helper(CPURISCVState *env,
target_ulong val_to_write,
>           target_ulong ms = env->mstatus;
>           target_ulong mask = SSTATUS_SIE | SSTATUS_SPIE | SSTATUS_UIE
>               | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS
> -            | SSTATUS_SUM | SSTATUS_MXR | SSTATUS_SD;
> +            | SSTATUS_SUM | SSTATUS_SD;
> +        if (env->priv_ver >= PRIV_VERSION_1_10_0) {
> +            mask |= SSTATUS_MXR;
> +        }
>           ms = (ms & ~mask) | (val_to_write & mask);
>           csr_write_helper(env, ms, CSR_MSTATUS);
>           break;
> @@ -439,7 +442,7 @@ target_ulong csr_read_helper(CPURISCVState *env,
target_ulong csrno)
>       case CSR_SSTATUS: {
>           target_ulong mask = SSTATUS_SIE | SSTATUS_SPIE | SSTATUS_UIE
>               | SSTATUS_UPIE | SSTATUS_SPP | SSTATUS_FS | SSTATUS_XS
> -            | SSTATUS_SUM |  SSTATUS_SD;
> +            | SSTATUS_SUM | SSTATUS_SD;
>           if (env->priv_ver >= PRIV_VERSION_1_10_0) {
>               mask |= SSTATUS_MXR;
>           }
> --
> 2.7.0