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[Qemu-devel] [PULL v1 0/5] Xilinx queue 2018-04-30


From: Edgar E. Iglesias
Subject: [Qemu-devel] [PULL v1 0/5] Xilinx queue 2018-04-30
Date: Mon, 30 Apr 2018 17:08:32 +0200

From: "Edgar E. Iglesias" <address@hidden>

The following changes since commit 6f0c4706b35dead265509115ddbd2a8d1af516c1:

  Merge remote-tracking branch 'remotes/kraxel/tags/usb-20180427-pull-request' 
into staging (2018-04-27 12:27:59 +0100)

are available in the git repository at:

  address@hidden:edgarigl/qemu.git 
tags/edgar/xilinx-next-2018-04-30.for-upstream

for you to fetch changes up to fce6a8eceb07e27f0cdea87427f4e560dfa0b1c8:

  target-microblaze: mmu: Make the TLBX MISS bit read-only (2018-04-30 16:43:20 
+0200)

----------------------------------------------------------------
edgar/xilinx-next-2018-01.for-upstream

----------------------------------------------------------------
Edgar E. Iglesias (5):
      target-microblaze: Respect MSR.PVR as read-only
      target-microblaze: Fix trap checks for FPU insns
      target-microblaze: Don't clobber the IMM reg for ld/st reversed
      target-microblaze: mmu: Make TLBSX write-only
      target-microblaze: mmu: Make the TLBX MISS bit read-only

 target/microblaze/mmu.c       | 9 ++++++++-
 target/microblaze/translate.c | 6 ++----
 2 files changed, 10 insertions(+), 5 deletions(-)

Edgar E. Iglesias (5):
  target-microblaze: Respect MSR.PVR as read-only
  target-microblaze: Fix trap checks for FPU insns
  target-microblaze: Don't clobber the IMM reg for ld/st reversed
  target-microblaze: mmu: Make TLBSX write-only
  target-microblaze: mmu: Make the TLBX MISS bit read-only

 target/microblaze/mmu.c       | 9 ++++++++-
 target/microblaze/translate.c | 6 ++----
 2 files changed, 10 insertions(+), 5 deletions(-)

-- 
2.14.1




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