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Re: [Qemu-devel] [PATCH v3 38/38] target-microblaze: Consolidate MMU ena
From: |
Alistair Francis |
Subject: |
Re: [Qemu-devel] [PATCH v3 38/38] target-microblaze: Consolidate MMU enabled checks |
Date: |
Wed, 16 May 2018 16:51:10 -0700 |
On Wed, May 16, 2018 at 11:51 AM, Edgar E. Iglesias
<address@hidden> wrote:
> From: "Edgar E. Iglesias" <address@hidden>
>
> Consolidate MMU enabled checks to cpu_mmu_index().
> No functional changes.
>
> Suggested-by: Richard Henderson <address@hidden>
> Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Alistair
> ---
> target/microblaze/cpu.h | 4 +++-
> target/microblaze/helper.c | 6 +++---
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
> index c77ca2d8f9..3c4e0ba80a 100644
> --- a/target/microblaze/cpu.h
> +++ b/target/microblaze/cpu.h
> @@ -360,8 +360,10 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo,
>
> static inline int cpu_mmu_index (CPUMBState *env, bool ifetch)
> {
> + MicroBlazeCPU *cpu = mb_env_get_cpu(env);
> +
> /* Are we in nommu mode?. */
> - if (!(env->sregs[SR_MSR] & MSR_VM)) {
> + if (!(env->sregs[SR_MSR] & MSR_VM) || !cpu->cfg.use_mmu) {
> return MMU_NOMMU_IDX;
> }
>
> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 985bdae8d1..bc753793ec 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -58,8 +58,7 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
> int size, int rw,
> int prot;
>
> /* Translate if the MMU is available and enabled. */
> - if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)
> - && mmu_idx != MMU_NOMMU_IDX) {
> + if (mmu_idx != MMU_NOMMU_IDX) {
> uint32_t vaddr, paddr;
> struct microblaze_mmu_lookup lu;
>
> @@ -270,9 +269,10 @@ hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr
> addr)
> CPUMBState *env = &cpu->env;
> target_ulong vaddr, paddr = 0;
> struct microblaze_mmu_lookup lu;
> + int mmu_idx = cpu_mmu_index(env, false);
> unsigned int hit;
>
> - if (env->sregs[SR_MSR] & MSR_VM) {
> + if (mmu_idx != MMU_NOMMU_IDX) {
> hit = mmu_translate(&env->mmu, &lu, addr, 0, 0);
> if (hit) {
> vaddr = addr & TARGET_PAGE_MASK;
> --
> 2.14.1
>
>
[Qemu-devel] [PATCH v3 38/38] target-microblaze: Consolidate MMU enabled checks, Edgar E. Iglesias, 2018/05/16
[Qemu-devel] [PATCH v3 35/38] target-microblaze: Convert env_btarget to i64, Edgar E. Iglesias, 2018/05/16
[Qemu-devel] [PATCH v3 37/38] target-microblaze: cpu_mmu_index: Fixup indentation, Edgar E. Iglesias, 2018/05/16