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[Qemu-devel] [PULL 01/25] target/arm: Honour FPCR.FZ in FRECPX
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 01/25] target/arm: Honour FPCR.FZ in FRECPX |
Date: |
Thu, 31 May 2018 15:23:33 +0100 |
The FRECPX instructions should (like most other floating point operations)
honour the FPCR.FZ bit which specifies whether input denormals should
be flushed to zero (or FZ16 for the half-precision version).
We forgot to implement this, which doesn't affect the results (since
the calculation doesn't actually care about the mantissa bits) but did
mean we were failing to set the FPSR.IDC bit.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/helper-a64.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index f92bdea732..c4d2a04827 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -384,6 +384,8 @@ float16 HELPER(frecpx_f16)(float16 a, void *fpstp)
return nan;
}
+ a = float16_squash_input_denormal(a, fpst);
+
val16 = float16_val(a);
sbit = 0x8000 & val16;
exp = extract32(val16, 10, 5);
@@ -413,6 +415,8 @@ float32 HELPER(frecpx_f32)(float32 a, void *fpstp)
return nan;
}
+ a = float32_squash_input_denormal(a, fpst);
+
val32 = float32_val(a);
sbit = 0x80000000ULL & val32;
exp = extract32(val32, 23, 8);
@@ -442,6 +446,8 @@ float64 HELPER(frecpx_f64)(float64 a, void *fpstp)
return nan;
}
+ a = float64_squash_input_denormal(a, fpst);
+
val64 = float64_val(a);
sbit = 0x8000000000000000ULL & val64;
exp = extract64(float64_val(a), 52, 11);
--
2.17.1
- [Qemu-devel] [PULL 04/25] arm_gicv3_kvm: increase clroffset accordingly, (continued)
- [Qemu-devel] [PULL 04/25] arm_gicv3_kvm: increase clroffset accordingly, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 02/25] MAINTAINERS: Add entries for newer MPS2 boards and devices, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 18/25] Make flatview_access_valid() take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 20/25] Make address_space_get_iotlb_entry() take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 21/25] Make flatview_do_translate() take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 23/25] vmstate.h: Provide VMSTATE_BOOL_SUB_ARRAY, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 25/25] KVM: GIC: Fix memory leak due to calling kvm_init_irq_routing twice, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 17/25] Make MemoryRegion valid.accepts callback take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 14/25] Make address_space_access_valid() take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 22/25] Make address_space_translate_iommu take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 01/25] target/arm: Honour FPCR.FZ in FRECPX,
Peter Maydell <=
- [Qemu-devel] [PULL 19/25] Make flatview_translate() take a MemTxAttrs argument, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 05/25] tcg: Fix helper function vs host abi for float16, Peter Maydell, 2018/05/31
- [Qemu-devel] [PULL 24/25] ARM: ACPI: Fix use-after-free due to memory realloc, Peter Maydell, 2018/05/31
- Re: [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2018/05/31
- Re: [Qemu-devel] [PULL 00/25] target-arm queue, no-reply, 2018/05/31
- [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2018/05/31