Re: [Qemu-devel] [PATCH] m25p80: add support for two bytes WRSR for Macronix chips

[Cédric Le Goater]

On 06/11/2018 07:15 PM, Cédric Le Goater wrote:
> On Macronix chips, two bytes can written to the WRSR. First byte will
> configure the status register and the second the configuration
> register. It is important to save the configuration value as it
> contains the dummy cycle setting when using dual or quad IO mode.
> 
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---
>  hw/block/m25p80.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> index b49c8e9caa04..29775e055a24 100644
> --- a/hw/block/m25p80.c
> +++ b/hw/block/m25p80.c
> @@ -699,6 +699,7 @@ static void complete_collecting_data(Flash *s)
>          case MAN_MACRONIX:
>              s->quad_enable = extract32(s->data[0], 6, 1);
>              if (s->len > 1) {
> +                s->volatile_cfg = s->data[1];
>                  s->four_bytes_address_mode = extract32(s->data[1], 5, 1);
>              }
>              break;
> 

I sent this patch to qemu-ppc instead of qemu-devel ...

Sorry for the noise.

C.