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Re: [Qemu-devel] [RFC PATCH 1/2] hw/isa/smc37c669-superio: Basic 'Config
Re: [Qemu-devel] [RFC PATCH 1/2] hw/isa/smc37c669-superio: Basic 'Config Registers' implementation
Thu, 14 Jun 2018 23:24:40 +0200
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On 14/06/2018 23:14, Richard Henderson wrote:
> On 06/14/2018 08:19 AM, Paolo Bonzini wrote:
>> But why isn't the parallel port at 0x378? That's the expected place on
>> PC (the second parallel port is at 0x278 and the third is at 0x3bc), and
>> I would expect other SuperIO chips to have it there too. That would be
>> a one line fix.
FWIW the datasheet says that the base parallel port address is
configurable using the config registers, and can be placed between 0x100
(inclusive) and 0x400 (exclusive), in 4-bytes increments if EPP is
disabled and in 8-byte increments if it is enabled. Therefore, 0x378
sounds like something that PALcode would probably use.