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[Qemu-devel] [PATCH v2 0/4] ppc/pnv: new Pnv8Chip and Pnv9Chip models

From: Cédric Le Goater
Subject: [Qemu-devel] [PATCH v2 0/4] ppc/pnv: new Pnv8Chip and Pnv9Chip models
Date: Fri, 15 Jun 2018 17:25:32 +0200


First are some cleanups around the ISA bus of the machine. Then
additions of new chip models for the different processor the PowerNV
machine supports, which come with their respective "powernv8" and
"powernv9" machines.

For some obscure reasons, this patchset breaks 'make check' :

  TEST: tests/spapr-phb-test... (pid=8196)
  qemu-system-ppc64: -device spapr-pci-host-bridge,index=30: 
spapr-pci-host-bridge needs a pseries machine
  Broken pipe
 FAIL: tests/spapr-phb-test

Any idea ? I guess this is because of the new machines. 



Changes since v1:

 - reworked the ISABus creation interface with the chip, the machine
   is not aware anymore of the chip controllers.
 - removed the bizarre controllers under the PnvChip base class.
 - kept back some changes on the ISA device tree name. They will come
   in time with the LPC controller for P9

Cédric Le Goater (4):
  ppc/pnv: introduce a new intc_create() operation to the chip model
  ppc/pnv: introduce a new isa_create() operation to the chip model
  ppc/pnv: introduce Pnv8Chip and Pnv9Chip models
  ppc/pnv: consolidate the creation of the ISA bus device tree

 include/hw/ppc/pnv.h     |  25 ++-
 include/hw/ppc/pnv_lpc.h |   3 +-
 hw/ppc/pnv.c             | 424 ++++++++++++++++++++++++++++++-----------------
 hw/ppc/pnv_core.c        |  18 +-
 hw/ppc/pnv_lpc.c         |  30 +++-
 5 files changed, 327 insertions(+), 173 deletions(-)


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