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Re: [Qemu-devel] [PATCH v3 2/8] hw/misc/tz-mpc.c: Implement registers

From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v3 2/8] hw/misc/tz-mpc.c: Implement registers
Date: Wed, 20 Jun 2018 16:41:33 +0100

On 20 June 2018 at 16:26, Auger Eric <address@hidden> wrote:
> Hi Peter,
> On 06/20/2018 03:20 PM, Peter Maydell wrote:
>> Implement the missing registers for the TZ MPC.
>> Signed-off-by: Peter Maydell <address@hidden>

>> @@ -127,7 +182,7 @@ static MemTxResult tz_mpc_reg_write(void *opaque, hwaddr 
>> addr,
>>      if (!attrs.secure && offset < A_PIDR4) {
>>          /* NS accesses can only see the ID registers */
> When reading
> "Identification registers can be read by any type of access." I
> understand all others can only be read by secure accesses. So I would
> have expected the same check on read side.

The check is there for reads too, it's in patch 1.

> Eric
>>          qemu_log_mask(LOG_GUEST_ERROR,
>> -                      "TZ MPC register read: NS access to offset 0x%x\n",
>> +                      "TZ MPC register write: NS access to offset 0x%x\n",
>>                        offset);

...this change should have been squashed into patch 2 (I cut-n-pasted
the check from the read function to the write function, forgot
to update the string, noticed that later but put the string fix into
the wrong patch).

Sorry about the confusion.

-- PMM

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