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Re: [Qemu-devel] [PATCH 06/35] target/mips: Add nanoMIPS pool16c instruc
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 06/35] target/mips: Add nanoMIPS pool16c instructions |
Date: |
Thu, 21 Jun 2018 20:40:16 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 |
On 06/20/2018 05:05 AM, Yongbok Kim wrote:
> Add nanoMIPS pool16c instructions
>
> Signed-off-by: Yongbok Kim <address@hidden>
> ---
> target/mips/translate.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
This is a good example of using a subroutine that should be used elsewhere.
Reviewed-by: Richard Henderson <address@hidden>
r~
>
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index f5b7e14..c1a98da 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -16232,6 +16232,27 @@ static int mmreg4z_nanomips(int r)
> return map[r & 0xf];
> }
>
> +static void gen_pool16c_nanomips_insn(DisasContext *ctx)
> +{
> + int rt = mmreg_nanomips(uMIPS_RD(ctx->opcode));
> + int rs = mmreg_nanomips(uMIPS_RS(ctx->opcode));
> +
> + switch ((ctx->opcode >> 2) & 0x3) {
> + case NM_NOT16:
> + gen_logic(ctx, OPC_NOR, rt, rs, 0);
> + break;
> + case NM_AND16:
> + gen_logic(ctx, OPC_AND, rt, rt, rs);
> + break;
> + case NM_XOR16:
> + gen_logic(ctx, OPC_XOR, rt, rt, rs);
> + break;
> + case NM_OR16:
> + gen_logic(ctx, OPC_OR, rt, rt, rs);
> + break;
> + }
> +}
> +
> static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
> {
> uint32_t op;
> @@ -16302,6 +16323,7 @@ static int decode_nanomips_opc(CPUMIPSState *env,
> DisasContext *ctx)
> case NM_P16C:
> switch (ctx->opcode & 1) {
> case NM_POOL16C_0:
> + gen_pool16c_nanomips_insn(ctx);
> break;
> case NM_LWXS16:
> gen_ldxs(ctx, rt, rs, rd);
>
- Re: [Qemu-devel] [PATCH 01/35] target/mips: Raise a RI when given fs is n/a from CTC1, (continued)
- [Qemu-devel] [PATCH 02/35] target/mips: Fix microMIPS on reset, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 03/35] target/mips: Add nanoMIPS OPCODE table, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 04/35] target/mips: Add decode_nanomips_opc(), Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 05/35] target/mips: Add nanoMIPS 16bit ld/st instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 06/35] target/mips: Add nanoMIPS pool16c instructions, Yongbok Kim, 2018/06/20
- Re: [Qemu-devel] [PATCH 06/35] target/mips: Add nanoMIPS pool16c instructions,
Richard Henderson <=
- [Qemu-devel] [PATCH 07/35] target/mips: Add nanoMIPS save and restore, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 08/35] target/mips: Add nanoMIPS 32bit instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 09/35] target/mips: Add nanoMIPS 48bit instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 10/35] target/mips: Add nanoMIPS pool32f instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 11/35] target/mips: Add nanoMIPS pool32a0 instructions, Yongbok Kim, 2018/06/20
- [Qemu-devel] [PATCH 12/35] target/mips: Add nanoMIPS pool32axf instructions, Yongbok Kim, 2018/06/20