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[Qemu-devel] [PULL v2 5/7] hw/riscv/sifive_u: Set the interrupt controle
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PULL v2 5/7] hw/riscv/sifive_u: Set the interrupt controler number of interrupts |
Date: |
Fri, 29 Jun 2018 10:22:13 -0700 |
Set the interrupt-controller ndev to the correct number taken from the
HiFive Unleashed board.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Michael Clark <address@hidden>
---
hw/riscv/sifive_u.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index f438a72c27..f71527eaff 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -187,7 +187,7 @@ static void create_fdt(SiFiveUState *s, const struct
MemmapEntry *memmap,
0x0, memmap[SIFIVE_U_PLIC].size);
qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
- qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 4);
+ qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 0x35);
qemu_fdt_setprop_cells(fdt, nodename, "phandle", 2);
qemu_fdt_setprop_cells(fdt, nodename, "linux,phandle", 2);
plic_phandle = qemu_fdt_get_phandle(fdt, nodename);
--
2.17.1
- [Qemu-devel] [PULL v2 0/7] riscv-pull queue, Alistair Francis, 2018/06/29
- [Qemu-devel] [PULL v2 1/7] hw/riscv/sifive_u: Create a SiFive U SoC object, Alistair Francis, 2018/06/29
- [Qemu-devel] [PULL v2 2/7] hw/riscv/sifive_e: Create a SiFive E SoC object, Alistair Francis, 2018/06/29
- [Qemu-devel] [PULL v2 3/7] hw/riscv/sifive_plic: Use gpios instead of irqs, Alistair Francis, 2018/06/29
- [Qemu-devel] [PULL v2 5/7] hw/riscv/sifive_u: Set the interrupt controler number of interrupts,
Alistair Francis <=
- [Qemu-devel] [PULL v2 4/7] hw/riscv/sifive_u: Set the soc device tree node as a simple-bus, Alistair Francis, 2018/06/29
- [Qemu-devel] [PULL v2 6/7] hw/riscv/sifive_u: Move the uart device tree node under /soc/, Alistair Francis, 2018/06/29
- [Qemu-devel] [PULL v2 7/7] hw/riscv/sifive_u: Connect the Cadence GEM Ethernet device, Alistair Francis, 2018/06/29
- Re: [Qemu-devel] [PULL v2 0/7] riscv-pull queue, Philippe Mathieu-Daudé, 2018/06/29
- Re: [Qemu-devel] [PULL v2 0/7] riscv-pull queue, Peter Maydell, 2018/06/30