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Re: [Qemu-devel] [PATCH] arm: Add ARMv6-M programmer's model support

From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] arm: Add ARMv6-M programmer's model support
Date: Tue, 17 Jul 2018 14:49:57 +0100

On 17 July 2018 at 14:42, Julia Suvorova <address@hidden> wrote:
> On 17.07.2018 16:09, Peter Maydell wrote:
>> This should be outside the "if v8" if(), because you also want it for v6M
>> (giving you the v6M CCR value of STKALIGN and UNALIGN_TRP set and all
>> other bits clear).
> This is the main problem. If I understand correctly, bits[4:8] also
> should be read-as-one (Table B3-4 ARMv6-M ARM). And I've already set them
> (with UNALIGN_TRP) before for v6m.

That is very odd. In table B3-10 bits [8:4] are documented as
"reserved" which usually means reads-as-zero. I wonder if table
B3-4 has a docs error and should really be saying
"bits [9,3] = 0b11" rather than specifying [9:3]" ?

Do you have access to a real hardware Cortex-M0 which you can read
the CCR value from ?

-- PMM

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