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Re: [Qemu-devel] [PATCH v3 32/40] elf: Add nanoMIPS specific variations
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH v3 32/40] elf: Add nanoMIPS specific variations in ELF header fields |
Date: |
Mon, 23 Jul 2018 17:39:09 +0000 |
> From: Richard Henderson <address@hidden>
> Sent: Monday, July 23, 2018 6:59 PM
> On 07/19/2018 05:55 AM, Stefan Markovic wrote:
> > From: Aleksandar Markovic <address@hidden>
> >
> > Add nanoMIPS-related values in ELF header fields as specified in
> > nanoMIPS' "ELF ABI Supplement".
> >
> > Signed-off-by: Aleksandar Markovic <address@hidden>
> > Signed-off-by: Stefan Markovic <address@hidden>
> > ---
> > include/elf.h | 20 ++++++++++++++++++++
> > 1 file changed, 20 insertions(+)
>
> None of these values have made it upstream to binutils yet,
> so I can't double-check them. However,
>
> Acked-by: Richard Henderson <address@hidden>
>
>
> r~
Hi, Richard.
True, binutils headers were not updated with these ELF-related values. However,
there is a publicly-available document at
https://codescape.mips.com/components/toolchain/nanomips/2018.04-02/releasenotes.html
that should be the source of information for binutils headers, or any other
related header in similar tools. Specifically, see Section 5.1 of that document.
Regards,
Aleksandar
- [Qemu-devel] [PATCH v3 34/40] linux-user: Don't check FCR31_NAN2008 bit for nanoMIPS, (continued)
- [Qemu-devel] [PATCH v3 34/40] linux-user: Don't check FCR31_NAN2008 bit for nanoMIPS, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 25/40] target/mips: Add updating CP0 BadInstrX register for nanoMIPs only, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 35/40] mips_malta: Add basic nanoMIPS boot code for MIPS' Malta, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 27/40] target/mips: Adjust behavior of Config3's ISAOnExc bit for nanoMIPS, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 37/40] mips_malta: Fix semihosting argument passing for nanoMIPS bare metal, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 32/40] elf: Add nanoMIPS specific variations in ELF header fields, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 02/40] target/mips: Add nanoMIPS base instruction set opcodes, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 26/40] target/mips: Implement CP0 Config0.WR bit functionality, Stefan Markovic, 2018/07/19
- [Qemu-devel] [PATCH v3 23/40] target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair, Stefan Markovic, 2018/07/19
[Qemu-devel] [PATCH v3 01/40] target/mips: Add preprocessor constants for nanoMIPS, Stefan Markovic, 2018/07/19