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[Qemu-devel] [PATCH v5 17/76] target/mips: Add placeholder and invocatio
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v5 17/76] target/mips: Add placeholder and invocation of decode_nanomips_opc() |
Date: |
Mon, 30 Jul 2018 18:11:50 +0200 |
From: Aleksandar Markovic <address@hidden>
Add empty body and invocation of decode_nanomips_opc() if the bit
ISA_NANOMIPS32 is set in ctx->insn_flags.
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/translate.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index c1843c1..c59ef5c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -16468,6 +16468,19 @@ enum {
NM_EVP = 0x01,
};
+
+/*
+ *
+ * nanoMIPS decoding engine
+ *
+ */
+
+static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx)
+{
+ return 2;
+}
+
+
/* SmartMIPS extension to MIPS32 */
#if defined(TARGET_MIPS64)
@@ -21273,6 +21286,9 @@ static void mips_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cs)
ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next);
insn_bytes = 4;
decode_opc(env, ctx);
+ } else if (ctx->insn_flags & ISA_NANOMIPS32) {
+ ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next);
+ insn_bytes = decode_nanomips_opc(env, ctx);
} else if (ctx->insn_flags & ASE_MICROMIPS) {
ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next);
insn_bytes = decode_micromips_opc(env, ctx);
--
2.7.4
- [Qemu-devel] [PATCH v5 10/76] linux-user: Add preprocessor availability control to some syscalls, (continued)
- [Qemu-devel] [PATCH v5 10/76] linux-user: Add preprocessor availability control to some syscalls, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 11/76] target/mips: Add preprocessor constants for nanoMIPS, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 12/76] target/mips: Add nanoMIPS base instruction set opcodes, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 13/76] target/mips: Add nanoMIPS DSP ASE opcodes, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 14/76] target/mips: Add gen_op_addr_addi(), Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 15/76] target/mips: Fix two instances of shadow variables, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 16/76] target/mips: Mark switch fallthroughs with interpretable comments, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 17/76] target/mips: Add placeholder and invocation of decode_nanomips_opc(),
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v5 18/76] target/mips: Add nanoMIPS decoding and extraction utilities, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 19/76] target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 20/76] target/mips: Add emulation of nanoMIPS 16-bit branch instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 21/76] target/mips: Add emulation of nanoMIPS 16-bit shift instructions, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 22/76] target/mips: Add emulation of nanoMIPS 16-bit misc instructions, Aleksandar Markovic, 2018/07/30