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Re: [Qemu-devel] [kvm-unit-tests PATCH v2 4/4] arm/arm64: GICv2: add GIC


From: Andrew Jones
Subject: Re: [Qemu-devel] [kvm-unit-tests PATCH v2 4/4] arm/arm64: GICv2: add GICD_ITARGETSR testing
Date: Fri, 3 Aug 2018 15:13:05 +0200
User-agent: NeoMutt/20180622

On Fri, Jul 20, 2018 at 04:39:42PM +0100, Andre Przywara wrote:
> Some tests for the ITARGETS registers.
> Bits corresponding to non-existent CPUs must be RAZ/WI.
> These registers must be byte-accessible, also check that accesses beyond
> the implemented IRQ limit are actually read-as-zero/write-ignore.
> 
> Signed-off-by: Andre Przywara <address@hidden>
> ---
>  arm/gic.c         | 43 +++++++++++++++++++++++++++++++++++++++++++
>  lib/arm/asm/gic.h |  1 +
>  2 files changed, 44 insertions(+)
>

Reviewed-by: Andrew Jones <address@hidden>



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