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[Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers |
Date: |
Thu, 16 Aug 2018 14:34:26 +0100 |
From: Joel Stanley <address@hidden>
The SDMC on the ast2500 has 170 registers.
Signed-off-by: Joel Stanley <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Tested-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/misc/aspeed_sdmc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h
index 551c8afdf4b..682f0f5d56d 100644
--- a/include/hw/misc/aspeed_sdmc.h
+++ b/include/hw/misc/aspeed_sdmc.h
@@ -14,7 +14,7 @@
#define TYPE_ASPEED_SDMC "aspeed.sdmc"
#define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC)
-#define ASPEED_SDMC_NR_REGS (0x8 >> 2)
+#define ASPEED_SDMC_NR_REGS (0x174 >> 2)
typedef struct AspeedSDMCState {
/*< private >*/
--
2.18.0
- [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true, (continued)
- [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 21/30] aspeed_sdmc: Init status always idle, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 12/30] target/arm: add "cortex-m0" CPU model, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 22/30] aspeed_sdmc: Handle ECC training, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 17/30] imx_spi: Unset XCH when TX FIFO becomes empty, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 24/30] target/arm: Adjust FPCR_MASK for FZ16, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 23/30] aspeed: add a max_ram_size property to the memory controller, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 15/30] loader: Implement .hex file loader, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers,
Peter Maydell <=
- [Qemu-devel] [PULL 19/30] aspeed_sdmc: Fix saved values, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 26/30] target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 27/30] target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 29/30] softfloat: Fix missing inexact for floating-point add, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 30/30] hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj(), Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 28/30] target/arm: Fix aa64 FCADD and FCMLA decode, Peter Maydell, 2018/08/16
- Re: [Qemu-devel] [PULL 00/30] target-arm queue, Peter Maydell, 2018/08/16