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[Qemu-devel] [PATCH 19/22] hw/ssi/pl022: Correct wrong value for PL022_I
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 19/22] hw/ssi/pl022: Correct wrong value for PL022_INT_RT |
Date: |
Mon, 20 Aug 2018 15:11:13 +0100 |
The PL022 interrupt registers have bits allocated as:
0: ROR (receive overrun)
1: RT (receive timeout)
2: RX (receive FIFO half full or less)
3: TX (transmit FIFO half full or less)
A cut and paste error meant we had the wrong value for
the PL022_INT_RT constant. This bug doesn't affect device
behaviour, because we don't implmenet the receive timeout
feature and so never set that interrupt bit.
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/pl022.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index 3ac57f4c96a..d310671d18e 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -38,7 +38,7 @@ do { fprintf(stderr, "pl022: error: " fmt , ## __VA_ARGS__);}
while (0)
#define PL022_SR_BSY 0x10
#define PL022_INT_ROR 0x01
-#define PL022_INT_RT 0x04
+#define PL022_INT_RT 0x02
#define PL022_INT_RX 0x04
#define PL022_INT_TX 0x08
--
2.18.0
- Re: [Qemu-devel] [PATCH 18/22] hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init, (continued)