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[Qemu-devel] [PATCH v11 24/46] target/mips: Add CP0 Config3 and Config5
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v11 24/46] target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure |
Date: |
Mon, 20 Aug 2018 20:16:32 +0200 |
From: Dimitrije Nikolic <address@hidden>
Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is
needed for implementing availability control of various instructions.
Signed-off-by: "Aleksandar Markovic <address@hidden>"
---
target/mips/translate.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 076f4bf..f0c50cb 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1449,6 +1449,8 @@ typedef struct DisasContext {
uint32_t opcode;
int insn_flags;
int32_t CP0_Config1;
+ int32_t CP0_Config3;
+ int32_t CP0_Config5;
/* Routine used to access memory */
int mem_idx;
TCGMemOp default_tcg_memop_mask;
@@ -23305,6 +23307,8 @@ static void mips_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
ctx->saved_pc = -1;
ctx->insn_flags = env->insn_flags;
ctx->CP0_Config1 = env->CP0_Config1;
+ ctx->CP0_Config3 = env->CP0_Config3;
+ ctx->CP0_Config5 = env->CP0_Config5;
ctx->btarget = 0;
ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff;
ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1;
--
2.7.4
- [Qemu-devel] [PATCH v11 09/46] target/mips: Add emulation of nanoMIPS 16-bit shift instructions, (continued)
- [Qemu-devel] [PATCH v11 09/46] target/mips: Add emulation of nanoMIPS 16-bit shift instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 32/46] target/mips: Add emulation of DSP ASE for nanoMIPS - part 4, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 38/46] target/mips: Fix ERET/ERETNC behavior related to ADEL exception, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 43/46] mips_malta: Add basic nanoMIPS boot code for Malta board, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 41/46] elf: On elf loading, treat both EM_MIPS and EM_NANOMIPS as legal for MIPS, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 40/46] elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 14/46] target/mips: Add emulation of some common nanoMIPS 32-bit instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 34/46] target/mips: Add emulation of DSP ASE for nanoMIPS - part 6, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 12/46] target/mips: Add emulation of nanoMIPS 16-bit logic instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 19/46] target/mips: Add emulation of misc nanoMIPS instructions (pool32axf), Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 24/46] target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v11 23/46] target/mips: Add emulation of nanoMIPS 32-bit load and store instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 21/46] target/mips: Implement emulation of nanoMIPS ROTX instruction, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 07/46] target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 04/46] target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 10/46] target/mips: Add emulation of nanoMIPS 16-bit misc instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 05/46] target/mips: Add placeholder and invocation of decode_nanomips_opc(), Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 17/46] target/mips: Add emulation of nanoMIPS FP instructions, Aleksandar Markovic, 2018/08/20
- [Qemu-devel] [PATCH v11 27/46] target/mips: Fix pre-nanoMIPS MT ASE instructions availability control, Aleksandar Markovic, 2018/08/20