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[Qemu-devel] [PULL v5 04/46] target/mips: Prevent switching mode related
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v5 04/46] target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS |
Date: |
Thu, 23 Aug 2018 16:18:19 +0200 |
From: Stefan Markovic <address@hidden>
Only if Config3.ISA is 3 (microMIPS), the mode should be switched in
cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode
change should happen.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4f95b9a..7fb322b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -21841,8 +21841,8 @@ void cpu_state_reset(CPUMIPSState *env)
env->CP0_Status |= (1 << CP0St_FR);
}
- if (env->CP0_Config3 & (1 << CP0C3_ISA)) {
- /* microMIPS on reset when Config3.ISA == {1, 3} */
+ if (env->CP0_Config3 & (1 << CP0C3_ISA) & (1 << (CP0C3_ISA + 1))) {
+ /* microMIPS on reset when Config3.ISA is 3 */
env->hflags |= MIPS_HFLAG_M16;
}
--
2.7.4
- [Qemu-devel] [PULL v5 00/46] MIPS queue August 2018 v5, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 04/46] target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v5 01/46] target/mips: Add preprocessor constants for nanoMIPS, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 13/46] target/mips: Add emulation of nanoMIPS 16-bit save and restore instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 03/46] target/mips: Add nanoMIPS DSP ASE opcodes, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 06/46] target/mips: Add nanoMIPS decoding and extraction utilities, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 08/46] target/mips: Add emulation of nanoMIPS 16-bit branch instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 12/46] target/mips: Add emulation of nanoMIPS 16-bit logic instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 11/46] target/mips: Add emulation of nanoMIPS 16-bit load and store instructions, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 22/46] target/mips: Implement emulation of nanoMIPS EXTW instruction, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 35/46] target/mips: Add availability control via bit NMS, Aleksandar Markovic, 2018/08/23
- [Qemu-devel] [PULL v5 24/46] target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure, Aleksandar Markovic, 2018/08/23