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Re: [Qemu-devel] [PATCH 2/7] target/mips: Add MXU instructions S32I2M an
Re: [Qemu-devel] [PATCH 2/7] target/mips: Add MXU instructions S32I2M and S32M2I
Mon, 27 Aug 2018 13:21:40 +0000
> Craig Janeczek via Qemu-devel wrote:
> I also wrote a series of tests which I cross compiled then ran on
> both HW and through QEMU. Although I did not submit those tests
> as part of this patchset as I am unsure of how to add them into the
> QEMU test infrastructure.
Here we have another case of someone having - and wanting to add to QEMU - some
I gather they are very similar to the tests in:
However, you say something is wrong with them (but we are using them for
testings of DSP and DSP R2 ASE for MIPS CPUs that have such feature).
Can you please tell us:
- What should we do to existing DSP and DSP R2 to fit into QEMU test
- What would be the guidance for Craig to integrate new tests that he wrote
into QEMU (which are I suppose of similar nature to DSP tests)?
[Qemu-devel] [PATCH 1/7] target/mips: Add MXU register support, Craig Janeczek, 2018/08/24
[Qemu-devel] [PATCH 4/7] target/mips: Add MXU instruction D16MUL, Craig Janeczek, 2018/08/24
[Qemu-devel] [PATCH 3/7] target/mips: Add MXU instruction S8LDD, Craig Janeczek, 2018/08/24