Re: [Qemu-devel] [PATCH v4 3/9] target/mips: Split mips instruction handling

[Aleksandar Markovic]

> From: Janeczek, Craig <address@hidden>
> Sent: Tuesday, September 4, 2018 4:44 PM
>
> Subject: RE: [PATCH v4 3/9] target/mips: Split mips instruction handling
>
> To clarify the OPC_MUL here is not an MXU instruction, this is the original 
> OPC_MUL that was in the special2 instruction set. The inclusion of this 
> instruction in this switch statement is due to the suggested method of 
> splitting up the mxu commands instruction handling switch statement from the 
> original special2 commands.

In any case, handling OPC_MUL (and others similar cases if it turns out to be 
needed) in such way should be in a separate patch in this series, and backed 
by, at the least, references to the Ingenic source code of gcc/asm or similar 
utilities.

Thanks,
Aleksandar