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Re: [Qemu-devel] [PATCH 5/6] x86_iommu/amd: Add interrupt remap support

From: Suravee Suthikulpanit
Subject: Re: [Qemu-devel] [PATCH 5/6] x86_iommu/amd: Add interrupt remap support when VAPIC is enabled
Date: Thu, 13 Sep 2018 14:16:11 +0700
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.13; rv:52.0) Gecko/20100101 Thunderbird/52.9.1


On 9/11/18 11:49 PM, Brijesh Singh wrote:
Emulate the interrupt remapping support when guest virtual APIC is

See IOMMU spec:https://support.amd.com/TechDocs/48882_IOMMU.pdf
(section for details information.

When VAPIC is enabled, it uses interrupt remapping as defined in
Table 22 and Figure 17 from IOMMU spec.

Cc: "Michael S. Tsirkin"<address@hidden>
Cc: Paolo Bonzini<address@hidden>
Cc: Richard Henderson<address@hidden>
Cc: Eduardo Habkost<address@hidden>
Cc: Marcel Apfelbaum<address@hidden>
Cc: Tom Lendacky<address@hidden>
Cc: Suravee Suthikulpanit<address@hidden>
Signed-off-by: Brijesh Singh<address@hidden>
  hw/i386/amd_iommu.c  | 68 +++++++++++++++++++++++++++++++++++++++++++++++++++-
  hw/i386/amd_iommu.h  | 38 +++++++++++++++++++++++++++++
  hw/i386/trace-events |  2 ++
  3 files changed, 107 insertions(+), 1 deletion(-)

The commit message here is incorrect and/or misleading.
The GASup bit is essentially allow 128-bit IRTE format.
The guest virtual APIC support is really GAMSup bit.


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