Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

[Emilio G. Cota]

On Wed, Sep 19, 2018 at 17:23:29 -0700, Peter Maydell wrote:
> On 19 September 2018 at 17:19, Alex Bennée <address@hidden> wrote:
> >> An additional improvement that I have thought of is to get rid
> >> of memset(-1) altogether. Instead, we'd store addresses in the TLB
> >> as $real_address+1, so that 0xff..ff is stored as 0x00..00. That way,
> >> instead of malloc+memset we'd just calloc a new TLB, which
> >> should be much faster since we'd most likely get zeroed pages
> >> from mmap. The cost would be an additional instruction in the fast
> >> path to subtract 1 from the address in the TLB, but this extra
> >> instruction would be essentially free in modern CPUs.
> >
> > Or test for 0 - I'm guessing pretty much any null page access could be
> > an always slow path as it's likely to be a fault.
> 
> Not true for instance for M profile CPUs, where page 0 likely
> contains the interrupt vector table.

Furthermore, testing for 0 would require a branch in the softmmu fast
path, which would probably have a greater perf impact than a
subtraction.

                E.