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Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole
From: |
Laszlo Ersek |
Subject: |
Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base |
Date: |
Thu, 27 Sep 2018 11:27:01 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 09/27/18 11:21, Laszlo Ersek wrote:
> On 09/27/18 07:48, Gerd Hoffmann wrote:
>> Hi,
>>
>>>> Maybe using memdev file backend with manually created sparse file
>>>> might actually work (with preallocate disabled)
>>>
>>> Thanks, this sounds like a good idea.
>>>
>>> I see shm_open() is used heavily in ivshmem-related tests. I haven't
>>> looked much at shm_open() before. (I've always known it existed in
>>> POSIX, but I've never cared.)
>>
>> How about improving the lovely pci-testdev we have a bit? Then we can
>> have huge pci bars without needing backing storage for them ...
>
> Earlier I checked
>
> qemu-system-x86_64 -device pci-testdev,\?
>
> briefly. I didn't see anything relevant and figured it was out of scope.
>
> (
> Actually, I've thought of yet another thing: the resource reservation
> capability for PCIe Root Ports. The 64-bit reservation field in that cap
> structure should be perfectly suitable for this testing.
>
> Except, of course, SeaBIOS only handles the bus number reservation
> field, at this time. :/
> )
>
> Looking at "docs/specs/pci-testdev.txt" now, extending the PCI testdev
> looks like a separate project to me. We're getting quite far from the
> original goal. I totally agree that if the PCI testdev already had this
> ability, it would be a perfect fit, but I don't think I can personally
> take that on now.
I realize you pasted a prototype patch below (thanks for that!), but it
doesn't update the documentation. I wouldn't like to dig down another
design rabbit hole here.
If you can pursue upstreaming this change, I can definitely delay my
series, and use the enhanced pci testdev as a reproducer. But, I'm not
explicitly asking you to pursue it -- none of this classifies as a
"serious bug", so these patches might not be the best uses of our times.
Laszlo
>> =========================== cut here ===========================
>> From 05cfced149b0b5c953391666c3151034bc7fe88b Mon Sep 17 00:00:00 2001
>> From: Gerd Hoffmann <address@hidden>
>> Date: Thu, 27 Sep 2018 07:43:10 +0200
>> Subject: [PATCH] pci-testdev: add optional memory bar
>>
>> Add memory bar to pci-testdev. Size is configurable using the membar
>> property. Setting the size to zero (default) turns it off.
>>
>> Signed-off-by: Gerd Hoffmann <address@hidden>
>> ---
>> hw/misc/pci-testdev.c | 18 ++++++++++++++++++
>> 1 file changed, 18 insertions(+)
>>
>> diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
>> index 32041f535f..af4d678ee4 100644
>> --- a/hw/misc/pci-testdev.c
>> +++ b/hw/misc/pci-testdev.c
>> @@ -85,6 +85,9 @@ typedef struct PCITestDevState {
>> MemoryRegion portio;
>> IOTest *tests;
>> int current;
>> +
>> + size_t membar_size;
>> + MemoryRegion membar;
>> } PCITestDevState;
>>
>> #define TYPE_PCI_TEST_DEV "pci-testdev"
>> @@ -253,6 +256,15 @@ static void pci_testdev_realize(PCIDevice *pci_dev,
>> Error **errp)
>> pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
>> pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
>>
>> + if (d->membar_size) {
>> + memory_region_init(&d->membar, OBJECT(d), "membar", d->membar_size);
>> + pci_register_bar(pci_dev, 2,
>> + PCI_BASE_ADDRESS_SPACE_MEMORY |
>> + PCI_BASE_ADDRESS_MEM_PREFETCH |
>> + PCI_BASE_ADDRESS_MEM_TYPE_64,
>> + &d->membar);
>> + }
>> +
>> d->current = -1;
>> d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
>> for (i = 0; i < IOTEST_MAX; ++i) {
>> @@ -305,6 +317,11 @@ static void qdev_pci_testdev_reset(DeviceState *dev)
>> pci_testdev_reset(d);
>> }
>>
>> +static Property pci_testdev_properties[] = {
>> + DEFINE_PROP_SIZE("membar", PCITestDevState, membar_size, 0),
>> + DEFINE_PROP_END_OF_LIST(),
>> +};
>> +
>> static void pci_testdev_class_init(ObjectClass *klass, void *data)
>> {
>> DeviceClass *dc = DEVICE_CLASS(klass);
>> @@ -319,6 +336,7 @@ static void pci_testdev_class_init(ObjectClass *klass,
>> void *data)
>> dc->desc = "PCI Test Device";
>> set_bit(DEVICE_CATEGORY_MISC, dc->categories);
>> dc->reset = qdev_pci_testdev_reset;
>> + dc->props = pci_testdev_properties;
>> }
>>
>> static const TypeInfo pci_testdev_info = {
>>
>
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, (continued)
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Marcel Apfelbaum, 2018/09/25
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Alex Williamson, 2018/09/25
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/25
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Igor Mammedov, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Gerd Hoffmann, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base,
Laszlo Ersek <=
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Gerd Hoffmann, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Eric Blake, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Eric Blake, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Alex Williamson, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Eric Blake, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/26
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Igor Mammedov, 2018/09/27
- Re: [Qemu-devel] [PATCH 2/2] hw/pci-host/x86: extend the 64-bit PCI hole relative to the fw-assigned base, Laszlo Ersek, 2018/09/27